Lines Matching defs:wm831x
3 * wm831x-irq.c -- Interrupt controller support for Wolfson WM831x PMICs
18 #include <linux/mfd/wm831x/core.h>
19 #include <linux/mfd/wm831x/pdata.h>
20 #include <linux/mfd/wm831x/gpio.h>
21 #include <linux/mfd/wm831x/irq.h>
324 static inline struct wm831x_irq_data *irq_to_wm831x_irq(struct wm831x *wm831x,
332 struct wm831x *wm831x = irq_data_get_irq_chip_data(data);
334 mutex_lock(&wm831x->irq_lock);
339 struct wm831x *wm831x = irq_data_get_irq_chip_data(data);
342 for (i = 0; i < ARRAY_SIZE(wm831x->gpio_update); i++) {
343 if (wm831x->gpio_update[i]) {
344 wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + i,
346 wm831x->gpio_update[i]);
347 wm831x->gpio_update[i] = 0;
351 for (i = 0; i < ARRAY_SIZE(wm831x->irq_masks_cur); i++) {
354 if (wm831x->irq_masks_cur[i] != wm831x->irq_masks_cache[i]) {
355 dev_dbg(wm831x->dev, "IRQ mask sync: %x = %x\n",
357 wm831x->irq_masks_cur[i]);
359 wm831x->irq_masks_cache[i] = wm831x->irq_masks_cur[i];
360 wm831x_reg_write(wm831x,
362 wm831x->irq_masks_cur[i]);
366 mutex_unlock(&wm831x->irq_lock);
371 struct wm831x *wm831x = irq_data_get_irq_chip_data(data);
372 struct wm831x_irq_data *irq_data = irq_to_wm831x_irq(wm831x,
375 wm831x->irq_masks_cur[irq_data->reg - 1] &= ~irq_data->mask;
380 struct wm831x *wm831x = irq_data_get_irq_chip_data(data);
381 struct wm831x_irq_data *irq_data = irq_to_wm831x_irq(wm831x,
384 wm831x->irq_masks_cur[irq_data->reg - 1] |= irq_data->mask;
389 struct wm831x *wm831x = irq_data_get_irq_chip_data(data);
411 wm831x->gpio_level_low[irq] = false;
412 wm831x->gpio_level_high[irq] = false;
415 wm831x->gpio_update[irq] = 0x10000 | WM831X_GPN_INT_MODE;
418 wm831x->gpio_update[irq] = 0x10000 | WM831X_GPN_POL;
421 wm831x->gpio_update[irq] = 0x10000;
424 wm831x->gpio_update[irq] = 0x10000 | WM831X_GPN_POL;
425 wm831x->gpio_level_high[irq] = true;
428 wm831x->gpio_update[irq] = 0x10000;
429 wm831x->gpio_level_low[irq] = true;
439 .name = "wm831x",
451 struct wm831x *wm831x = data;
458 primary = wm831x_reg_read(wm831x, WM831X_SYSTEM_INTERRUPTS);
460 dev_err(wm831x->dev, "Failed to read system interrupt: %d\n",
471 handle_nested_irq(irq_find_mapping(wm831x->irq_domain,
474 handle_nested_irq(irq_find_mapping(wm831x->irq_domain,
491 *status = wm831x_reg_read(wm831x, status_addr);
493 dev_err(wm831x->dev,
502 *status &= ~wm831x->irq_masks_cur[offset];
507 wm831x_reg_write(wm831x, status_addr, *status);
511 handle_nested_irq(irq_find_mapping(wm831x->irq_domain,
518 wm831x->gpio_level_high[i - WM831X_IRQ_GPIO_1]) {
519 ret = wm831x_reg_read(wm831x, WM831X_GPIO_LEVEL);
521 handle_nested_irq(irq_find_mapping(wm831x->irq_domain,
523 ret = wm831x_reg_read(wm831x,
529 wm831x->gpio_level_low[i - WM831X_IRQ_GPIO_1]) {
530 ret = wm831x_reg_read(wm831x, WM831X_GPIO_LEVEL);
532 handle_nested_irq(irq_find_mapping(wm831x->irq_domain,
534 ret = wm831x_reg_read(wm831x,
560 int wm831x_irq_init(struct wm831x *wm831x, int irq)
562 struct wm831x_pdata *pdata = &wm831x->pdata;
566 mutex_init(&wm831x->irq_lock);
569 for (i = 0; i < ARRAY_SIZE(wm831x->irq_masks_cur); i++) {
570 wm831x->irq_masks_cur[i] = 0xffff;
571 wm831x->irq_masks_cache[i] = 0xffff;
572 wm831x_reg_write(wm831x, WM831X_INTERRUPT_STATUS_1_MASK + i,
581 dev_warn(wm831x->dev, "Failed to allocate IRQs: %d\n",
590 domain = irq_domain_add_legacy(wm831x->dev->of_node,
594 wm831x);
596 domain = irq_domain_add_linear(wm831x->dev->of_node,
599 wm831x);
602 dev_warn(wm831x->dev, "Failed to allocate IRQ domain\n");
611 wm831x_set_bits(wm831x, WM831X_IRQ_CONFIG,
614 wm831x->irq = irq;
615 wm831x->irq_domain = domain;
625 dev_warn(wm831x->dev,
632 "wm831x", wm831x);
634 dev_err(wm831x->dev, "Failed to request IRQ %d: %d\n",
639 dev_warn(wm831x->dev,
644 wm831x_reg_write(wm831x, WM831X_SYSTEM_INTERRUPTS_MASK, 0);
649 void wm831x_irq_exit(struct wm831x *wm831x)
651 if (wm831x->irq)
652 free_irq(wm831x->irq, wm831x);