Lines Matching refs:pcf
19 int pcf50633_register_irq(struct pcf50633 *pcf, int irq,
25 if (WARN_ON(pcf->irq_handler[irq].handler))
28 mutex_lock(&pcf->lock);
29 pcf->irq_handler[irq].handler = handler;
30 pcf->irq_handler[irq].data = data;
31 mutex_unlock(&pcf->lock);
37 int pcf50633_free_irq(struct pcf50633 *pcf, int irq)
42 mutex_lock(&pcf->lock);
43 pcf->irq_handler[irq].handler = NULL;
44 mutex_unlock(&pcf->lock);
50 static int __pcf50633_irq_mask_set(struct pcf50633 *pcf, int irq, u8 mask)
59 pcf50633_reg_set_bit_mask(pcf, reg, bit, mask ? bit : 0);
61 mutex_lock(&pcf->lock);
64 pcf->mask_regs[idx] |= bit;
66 pcf->mask_regs[idx] &= ~bit;
68 mutex_unlock(&pcf->lock);
73 int pcf50633_irq_mask(struct pcf50633 *pcf, int irq)
75 dev_dbg(pcf->dev, "Masking IRQ %d\n", irq);
77 return __pcf50633_irq_mask_set(pcf, irq, 1);
81 int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq)
83 dev_dbg(pcf->dev, "Unmasking IRQ %d\n", irq);
85 return __pcf50633_irq_mask_set(pcf, irq, 0);
89 int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq)
96 return pcf->mask_regs[reg] & bits;
100 static void pcf50633_irq_call_handler(struct pcf50633 *pcf, int irq)
102 if (pcf->irq_handler[irq].handler)
103 pcf->irq_handler[irq].handler(irq, pcf->irq_handler[irq].data);
111 struct pcf50633 *pcf = data;
116 ret = pcf50633_read_block(pcf, PCF50633_REG_INT1,
119 dev_err(pcf->dev, "Error reading INT registers\n");
129 pcf50633_reg_write(pcf, PCF50633_REG_OOCSHDWN, 0x04);
134 chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2);
143 chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2);
150 dev_dbg(pcf->dev, "INT1=0x%02x INT2=0x%02x INT3=0x%02x "
156 if ((pcf_int[0] & PCF50633_INT1_SECOND) && pcf->onkey1s_held) {
157 dev_info(pcf->dev, "ONKEY1S held for %d secs\n",
158 pcf->onkey1s_held);
159 if (pcf->onkey1s_held++ == PCF50633_ONKEY1S_TIMEOUT)
160 if (pcf->pdata->force_shutdown)
161 pcf->pdata->force_shutdown(pcf);
165 dev_info(pcf->dev, "ONKEY1S held\n");
166 pcf->onkey1s_held = 1 ;
169 pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT1M,
173 pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT2M,
177 if ((pcf_int[1] & PCF50633_INT2_ONKEYR) && pcf->onkey1s_held) {
178 pcf->onkey1s_held = 0;
181 if (pcf->mask_regs[0] & PCF50633_INT1_SECOND)
182 pcf50633_reg_set_bit_mask(pcf,
187 if (pcf->mask_regs[1] & PCF50633_INT2_ONKEYR)
188 pcf50633_reg_set_bit_mask(pcf,
195 if (pcf->is_suspended) {
196 pcf->is_suspended = 0;
200 pcf->resume_reason[i] = pcf_int[i] &
201 pcf->pdata->resumers[i];
210 pcf_int[i] &= ~pcf->mask_regs[i];
214 pcf50633_irq_call_handler(pcf, (i * 8) + j);
223 int pcf50633_irq_suspend(struct pcf50633 *pcf)
232 disable_irq(pcf->irq);
235 ret = pcf50633_read_block(pcf, PCF50633_REG_INT1M,
236 ARRAY_SIZE(pcf->suspend_irq_masks),
237 pcf->suspend_irq_masks);
239 dev_err(pcf->dev, "error saving irq masks\n");
245 res[i] = ~pcf->pdata->resumers[i];
247 ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M,
250 dev_err(pcf->dev, "error writing wakeup irq masks\n");
254 pcf->is_suspended = 1;
260 int pcf50633_irq_resume(struct pcf50633 *pcf)
265 ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M,
266 ARRAY_SIZE(pcf->suspend_irq_masks),
267 pcf->suspend_irq_masks);
269 dev_err(pcf->dev, "Error restoring saved suspend masks\n");
271 enable_irq(pcf->irq);
278 int pcf50633_irq_init(struct pcf50633 *pcf, int irq)
282 pcf->irq = irq;
285 pcf->mask_regs[0] = 0x80;
286 pcf50633_reg_write(pcf, PCF50633_REG_INT1M, pcf->mask_regs[0]);
287 pcf50633_reg_write(pcf, PCF50633_REG_INT2M, 0x00);
288 pcf50633_reg_write(pcf, PCF50633_REG_INT3M, 0x00);
289 pcf50633_reg_write(pcf, PCF50633_REG_INT4M, 0x00);
290 pcf50633_reg_write(pcf, PCF50633_REG_INT5M, 0x00);
294 "pcf50633", pcf);
297 dev_err(pcf->dev, "Failed to request IRQ %d\n", ret);
300 dev_err(pcf->dev, "IRQ %u cannot be enabled as wake-up source"
306 void pcf50633_irq_free(struct pcf50633 *pcf)
308 free_irq(pcf->irq, pcf);