Lines Matching refs:irqd
31 struct pmic_irq_data *irqd = chip->irq_data;
33 irqd->enable_hwirq[hwirq] = true;
40 struct pmic_irq_data *irqd = chip->irq_data;
42 irqd->enable_hwirq[hwirq] = false;
56 struct pmic_irq_data *irqd = chip->irq_data;
58 for (i = 0; i < irqd->num_pmic_irqs; i++) {
59 if (irqd->enable_hwirq[i] == irqd->cache_hwirq[i])
64 while ((top_gp + 1) < irqd->num_top &&
76 irqd->enable_hwirq[i] << shift);
78 irqd->cache_hwirq[i] = irqd->enable_hwirq[i];
181 struct pmic_irq_data *irqd;
183 irqd = devm_kzalloc(chip->dev, sizeof(*irqd), GFP_KERNEL);
184 if (!irqd)
187 chip->irq_data = irqd;
190 irqd->top_int_status_reg = MT6358_TOP_INT_STATUS0;
191 irqd->num_pmic_irqs = MT6358_IRQ_NR;
192 irqd->num_top = ARRAY_SIZE(mt6358_ints);
194 irqd->enable_hwirq = devm_kcalloc(chip->dev,
195 irqd->num_pmic_irqs,
196 sizeof(*irqd->enable_hwirq),
198 if (!irqd->enable_hwirq)
201 irqd->cache_hwirq = devm_kcalloc(chip->dev,
202 irqd->num_pmic_irqs,
203 sizeof(*irqd->cache_hwirq),
205 if (!irqd->cache_hwirq)
209 for (i = 0; i < irqd->num_top; i++) {
217 irqd->num_pmic_irqs,