Lines Matching refs:lpass
58 static void exynos_lpass_core_sw_reset(struct exynos_lpass *lpass, int mask)
62 regmap_read(lpass->top, SFR_LPASS_CORE_SW_RESET, &val);
65 regmap_write(lpass->top, SFR_LPASS_CORE_SW_RESET, val);
70 regmap_write(lpass->top, SFR_LPASS_CORE_SW_RESET, val);
73 static void exynos_lpass_enable(struct exynos_lpass *lpass)
75 clk_prepare_enable(lpass->sfr0_clk);
78 regmap_write(lpass->top, SFR_LPASS_INTR_CA5_MASK,
81 regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK,
85 exynos_lpass_core_sw_reset(lpass, LPASS_I2S_SW_RESET);
86 exynos_lpass_core_sw_reset(lpass, LPASS_DMA_SW_RESET);
87 exynos_lpass_core_sw_reset(lpass, LPASS_MEM_SW_RESET);
88 exynos_lpass_core_sw_reset(lpass, LPASS_UART_SW_RESET);
91 static void exynos_lpass_disable(struct exynos_lpass *lpass)
94 regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK, 0);
95 regmap_write(lpass->top, SFR_LPASS_INTR_CA5_MASK, 0);
97 clk_disable_unprepare(lpass->sfr0_clk);
111 struct exynos_lpass *lpass;
115 lpass = devm_kzalloc(dev, sizeof(*lpass), GFP_KERNEL);
116 if (!lpass)
124 lpass->sfr0_clk = devm_clk_get(dev, "sfr0_ctrl");
125 if (IS_ERR(lpass->sfr0_clk))
126 return PTR_ERR(lpass->sfr0_clk);
128 lpass->top = regmap_init_mmio(dev, base_top,
130 if (IS_ERR(lpass->top)) {
132 return PTR_ERR(lpass->top);
135 platform_set_drvdata(pdev, lpass);
138 exynos_lpass_enable(lpass);
145 struct exynos_lpass *lpass = platform_get_drvdata(pdev);
147 exynos_lpass_disable(lpass);
150 exynos_lpass_disable(lpass);
151 regmap_exit(lpass->top);
158 struct exynos_lpass *lpass = dev_get_drvdata(dev);
160 exynos_lpass_disable(lpass);
167 struct exynos_lpass *lpass = dev_get_drvdata(dev);
169 exynos_lpass_enable(lpass);
181 { .compatible = "samsung,exynos5433-lpass" },
188 .name = "exynos-lpass",