Lines Matching defs:PLL_FIX
462 PLL_FIX,
472 CLK_MGT_ENTRY(UARTCLK, PLL_FIX, true),
473 CLK_MGT_ENTRY(MSP02CLK, PLL_FIX, true),
474 CLK_MGT_ENTRY(MSP1CLK, PLL_FIX, true),
475 CLK_MGT_ENTRY(I2CCLK, PLL_FIX, true),
477 CLK_MGT_ENTRY(SLIMCLK, PLL_FIX, true),
484 CLK_MGT_ENTRY(LCDCLK, PLL_FIX, true),
488 CLK_MGT_ENTRY(HDMICLK, PLL_FIX, false),
492 CLK_MGT_ENTRY(IPI2CCLK, PLL_FIX, true),
493 CLK_MGT_ENTRY(DSIALTCLK, PLL_FIX, false),
496 CLK_MGT_ENTRY(TVCLK, PLL_FIX, true),
497 CLK_MGT_ENTRY(SSPCLK, PLL_FIX, true),
498 CLK_MGT_ENTRY(RNGCLK, PLL_FIX, true),
499 CLK_MGT_ENTRY(UICCCLK, PLL_FIX, false),
1420 if ((branch == PLL_FIX) || ((branch == PLL_DIV) &&
1484 rate = pll_rate(PRCM_PLLDDR_FREQ, ROOT_CLOCK_RATE, PLL_FIX);