Lines Matching refs:x200
994 TEGRA30_MC_RESET(AFI, 0x200, 0x204, 0),
995 TEGRA30_MC_RESET(AVPC, 0x200, 0x204, 1),
996 TEGRA30_MC_RESET(DC, 0x200, 0x204, 2),
997 TEGRA30_MC_RESET(DCB, 0x200, 0x204, 3),
998 TEGRA30_MC_RESET(EPP, 0x200, 0x204, 4),
999 TEGRA30_MC_RESET(2D, 0x200, 0x204, 5),
1000 TEGRA30_MC_RESET(HC, 0x200, 0x204, 6),
1001 TEGRA30_MC_RESET(HDA, 0x200, 0x204, 7),
1002 TEGRA30_MC_RESET(ISP, 0x200, 0x204, 8),
1003 TEGRA30_MC_RESET(MPCORE, 0x200, 0x204, 9),
1004 TEGRA30_MC_RESET(MPCORELP, 0x200, 0x204, 10),
1005 TEGRA30_MC_RESET(MPE, 0x200, 0x204, 11),
1006 TEGRA30_MC_RESET(3D, 0x200, 0x204, 12),
1007 TEGRA30_MC_RESET(3D2, 0x200, 0x204, 13),
1008 TEGRA30_MC_RESET(PPCS, 0x200, 0x204, 14),
1009 TEGRA30_MC_RESET(SATA, 0x200, 0x204, 15),
1010 TEGRA30_MC_RESET(VDE, 0x200, 0x204, 16),
1011 TEGRA30_MC_RESET(VI, 0x200, 0x204, 17),