Lines Matching defs:tegra210_emc
886 struct tegra210_emc {
939 void (*set_clock)(struct tegra210_emc *emc, u32 clksrc);
940 u32 (*periodic_compensation)(struct tegra210_emc *emc);
943 static inline void emc_writel(struct tegra210_emc *emc, u32 value,
949 static inline u32 emc_readl(struct tegra210_emc *emc, unsigned int offset)
954 static inline void emc_channel_writel(struct tegra210_emc *emc,
961 static inline u32 emc_channel_readl(struct tegra210_emc *emc,
967 static inline void ccfifo_writel(struct tegra210_emc *emc, u32 value,
990 int tegra210_emc_set_refresh(struct tegra210_emc *emc,
992 u32 tegra210_emc_mrr_read(struct tegra210_emc *emc, unsigned int chip,
994 void tegra210_emc_do_clock_change(struct tegra210_emc *emc, u32 clksrc);
995 void tegra210_emc_set_shadow_bypass(struct tegra210_emc *emc, int set);
996 void tegra210_emc_timing_update(struct tegra210_emc *emc);
998 struct tegra210_emc_timing *tegra210_emc_find_timing(struct tegra210_emc *emc,
1000 void tegra210_emc_adjust_timing(struct tegra210_emc *emc,
1002 int tegra210_emc_wait_for_update(struct tegra210_emc *emc, unsigned int channel,
1006 void tegra210_emc_dll_disable(struct tegra210_emc *emc);
1007 void tegra210_emc_dll_enable(struct tegra210_emc *emc);
1008 u32 tegra210_emc_dll_prelock(struct tegra210_emc *emc, u32 clksrc);
1009 u32 tegra210_emc_dvfs_power_ramp_down(struct tegra210_emc *emc, u32 clk,
1011 u32 tegra210_emc_dvfs_power_ramp_up(struct tegra210_emc *emc, u32 clk,
1014 void tegra210_emc_start_periodic_compensation(struct tegra210_emc *emc);