Lines Matching refs:burst_regs
633 if (last->burst_regs[EMC_ZCAL_WAIT_CNT_INDEX] & BIT(31))
636 if ((next->burst_regs[EMC_ZCAL_INTERVAL_INDEX] != 0 &&
637 last->burst_regs[EMC_ZCAL_INTERVAL_INDEX] == 0) ||
644 if ((next->burst_regs[EMC_FBIO_CFG5_INDEX] & BIT(25)) &&
665 emc_cfg = next->burst_regs[EMC_CFG_INDEX];
761 ((next->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] &
763 (last->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] &
765 ((next->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] &
767 (last->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] &
770 (next->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] &
773 (next->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] &
778 emc_writel(emc, last->burst_regs
784 emc_writel(emc, last->burst_regs
791 if ((((last->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX] &
793 ((next->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX] &
795 (((last->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX] &
797 ((next->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX] &
800 next->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX];
802 last->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX];
827 if (next->burst_regs[EMC_CFG_DIG_DLL_INDEX] &
930 next->burst_regs[EMC_RP_INDEX]);
932 if (last->burst_regs[EMC_RP_INDEX] < tRTM) {
933 if (tRTM > (last->burst_regs[EMC_R2P_INDEX] +
934 last->burst_regs[EMC_RP_INDEX])) {
935 R2P_war = tRTM - last->burst_regs[EMC_RP_INDEX];
936 RP_war = last->burst_regs[EMC_RP_INDEX];
937 TRPab_war = last->burst_regs[EMC_TRPAB_INDEX];
941 last->burst_regs[EMC_RP_INDEX] - 63;
949 R2P_war = last->burst_regs[EMC_R2P_INDEX];
950 RP_war = last->burst_regs[EMC_RP_INDEX];
951 TRPab_war = last->burst_regs[EMC_TRPAB_INDEX];
955 W2P_war = last->burst_regs[EMC_W2P_INDEX]
964 W2P_war = last->burst_regs[
968 if ((last->burst_regs[EMC_W2P_INDEX] ^ W2P_war) ||
969 (last->burst_regs[EMC_R2P_INDEX] ^ R2P_war) ||
970 (last->burst_regs[EMC_RP_INDEX] ^ RP_war) ||
971 (last->burst_regs[EMC_TRPAB_INDEX] ^ TRPab_war)) {
1003 emc_dbg(emc, SUB_STEPS, "Writing burst_regs\n");
1012 value = next->burst_regs[i];
1241 value = next->burst_regs[EMC_ZCAL_WAIT_CNT_INDEX];
1271 ccfifo_writel(emc, (next->burst_regs[EMC_MRW6_INDEX] &
1273 (last->burst_regs[EMC_MRW6_INDEX] &
1275 ccfifo_writel(emc, (next->burst_regs[EMC_MRW14_INDEX] &
1277 (last->burst_regs[EMC_MRW14_INDEX] &
1282 (next->burst_regs[EMC_MRW7_INDEX] &
1284 (last->burst_regs[EMC_MRW7_INDEX] &
1287 (next->burst_regs[EMC_MRW15_INDEX] &
1289 (last->burst_regs[EMC_MRW15_INDEX] &
1577 next->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX],
1606 ccfifo_writel(emc, next->burst_regs[EMC_ZCAL_INTERVAL_INDEX],
1610 ccfifo_writel(emc, next->burst_regs[EMC_CFG_INDEX] &
1627 next->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] &
1632 next->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] &
1680 emc_writel(emc, next->burst_regs[EMC_ZCAL_WAIT_CNT_INDEX],
1682 emc_writel(emc, next->burst_regs[EMC_ZCAL_INTERVAL_INDEX],
1693 emc_writel(emc, next->burst_regs[EMC_MRS_WAIT_CNT_INDEX],
1696 emc_writel(emc, next->burst_regs[EMC_ZCAL_WAIT_CNT_INDEX],
1708 emc_writel(emc, next->burst_regs[EMC_CFG_INDEX], EMC_CFG);
1722 next->burst_regs[EMC_PMACRO_AUTOCAL_CFG_COMMON_INDEX],
1753 if (next->burst_regs[EMC_CFG_DIG_DLL_INDEX] & EMC_CFG_DIG_DLL_CFG_DLL_EN) {