Lines Matching defs:emc_dbg
36 #define emc_dbg(emc, flags, ...) dev_dbg(emc->dev, __VA_ARGS__)
108 emc_dbg(emc, EMA_UPDATES, "%s: (s=%lu) EMA: %u\n", \
498 emc_dbg(emc, PER_TRAIN, "Periodic training starting\n");
559 emc_dbg(emc, EMA_WRITES, "0x%08x <= 0x%08x\n",
616 u32 emc_dbg, emc_cfg_pipe_clk, emc_pin;
624 emc_dbg(emc, INFO, "Running clock change.\n");
661 emc_dbg = emc_readl(emc, EMC_DBG);
675 emc_dbg(emc, INFO, "Clock change version: %d\n",
677 emc_dbg(emc, INFO, "DRAM type = %d\n", dram_type);
678 emc_dbg(emc, INFO, "DRAM dev #: %u\n", emc->num_devices);
679 emc_dbg(emc, INFO, "Next EMC clksrc: 0x%08x\n", clksrc);
680 emc_dbg(emc, INFO, "DLL clksrc: 0x%08x\n", next->dll_clk_src);
681 emc_dbg(emc, INFO, "last rate: %u, next rate %u\n", last->rate,
683 emc_dbg(emc, INFO, "last period: %u, next period: %u\n",
685 emc_dbg(emc, INFO, " shared_zq_resistor: %d\n", !!shared_zq_resistor);
686 emc_dbg(emc, INFO, " num_channels: %u\n", emc->num_channels);
687 emc_dbg(emc, INFO, " opt_dll_mode: %d\n", opt_dll_mode);
693 emc_dbg(emc, STEPS, "Step 1\n");
694 emc_dbg(emc, STEPS, "Step 1.1: Disable DLL temporarily.\n");
706 emc_dbg(emc, STEPS, "Step 1.2: Disable AUTOCAL temporarily.\n");
717 emc_dbg(emc, STEPS, "Step 1.3: Disable other power features.\n");
825 emc_dbg(emc, STEPS, "Step 2\n");
829 emc_dbg(emc, INFO, "Prelock enabled for target frequency.\n");
831 emc_dbg(emc, INFO, "DLL out: 0x%03x\n", value);
833 emc_dbg(emc, INFO, "Disabling DLL for target frequency.\n");
841 emc_dbg(emc, STEPS, "Step 3\n");
861 emc_dbg(emc, STEPS, "Step 4\n");
872 emc_dbg(emc, STEPS, "Step 5\n");
889 emc_dbg(emc, STEPS, "Step 6\n");
895 emc_dbg(emc, STEPS, "Step 7\n");
896 emc_dbg(emc, SUB_STEPS, "Step 7.1: Bug 200024907 - Patch RP R2P");
929 emc_dbg(emc, INFO, "tRTM = %u, EMC_RP = %u\n", tRTM,
980 emc_dbg(emc, INFO, "Skipped WAR\n");
1002 emc_dbg(emc, STEPS, "Step 8\n");
1003 emc_dbg(emc, SUB_STEPS, "Writing burst_regs\n");
1082 emc_dbg(emc, SUB_STEPS, "Writing burst_regs_per_ch\n");
1108 emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,
1116 emc_dbg(emc, SUB_STEPS, "Writing vref_regs\n");
1128 emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,
1135 emc_dbg(emc, SUB_STEPS, "Writing trim_regs\n");
1155 emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,
1157 emc_dbg(emc, EMA_WRITES, "0x%08x <= 0x%08x\n",
1161 emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,
1168 emc_dbg(emc, SUB_STEPS, "Writing trim_regs_per_ch\n");
1195 emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,
1197 emc_dbg(emc, EMA_WRITES, "0x%08x <= 0x%08x\n", offset,
1201 emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,
1208 emc_dbg(emc, SUB_STEPS, "Writing burst_mc_regs\n");
1214 emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,
1223 emc_dbg(emc, SUB_STEPS, "Writing la_scale_regs\n");
1226 emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,
1239 emc_dbg(emc, STEPS, "Step 9\n");
1248 value = emc_dbg | (EMC_DBG_WRITE_MUX_ACTIVE |
1253 emc_writel(emc, emc_dbg, EMC_DBG);
1260 emc_dbg(emc, STEPS, "Step 10\n");
1357 emc_dbg(emc, STEPS, "Step 11\n");
1361 value = emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE | EMC_DBG_WRITE_ACTIVE_ONLY;
1371 emc_dbg(emc, STEPS, "Step 12\n");
1381 emc_dbg(emc, STEPS, "Step 13\n");
1384 ccfifo_writel(emc, emc_dbg, EMC_DBG, 0);
1390 emc_dbg(emc, STEPS, "Step 14\n");
1407 emc_dbg(emc, STEPS, "Step 15\n");
1419 emc_dbg(emc, INFO, "tZQCAL_lpddr4_fc_adj = %u\n", tZQCAL_lpddr4_fc_adj);
1420 emc_dbg(emc, INFO, "dst_clk_period = %u\n",
1422 emc_dbg(emc, INFO, "next->dram_timings[T_PDEX] = %u\n",
1424 emc_dbg(emc, INFO, "zq_latch_dvfs_wait_time = %d\n",
1496 emc_dbg(emc, STEPS, "Step 17\n");
1505 emc_dbg(emc, STEPS, "Step 18\n");
1526 emc_dbg(emc, STEPS, "Step 19\n");
1586 emc_dbg(emc, STEPS, "Step 20\n");
1600 emc_dbg(emc, STEPS, "Step 21\n");
1603 ccfifo_writel(emc, emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE,
1613 ccfifo_writel(emc, emc_dbg, EMC_DBG, 0);
1620 emc_dbg(emc, STEPS, "Step 22\n");
1640 emc_dbg(emc, STEPS, "Step 23\n");
1662 emc_dbg(emc, STEPS, "Step 25\n");
1676 emc_dbg(emc, STEPS, "Step 26\n");
1705 emc_dbg(emc, STEPS, "Step 27\n");
1718 emc_dbg(emc, STEPS, "Step 28\n");
1730 emc_dbg(emc, STEPS, "Step 29\n");
1751 emc_dbg(emc, STEPS, "Step 30: Re-enable DLL and AUTOCAL\n");