Lines Matching refs:value
488 static void emc_ccfifo_writel(struct tegra_emc *emc, u32 value,
491 writel(value, emc->regs + EMC_CCFIFO_DATA);
498 u32 value;
503 value = readl(emc->regs + EMC_STATUS);
504 if ((value & EMC_STATUS_TIMING_UPDATE_STALLED) == 0)
515 u32 value;
520 value = readl(emc->regs + EMC_AUTO_CAL_STATUS);
521 if ((value & EMC_AUTO_CAL_STATUS_ACTIVE) == 0)
532 u32 value;
535 value = readl(emc->regs + EMC_INTSTATUS);
536 if (value & EMC_INTSTATUS_CLKCHANGE_COMPLETE)
886 u32 value;
889 err = of_property_read_u32(node, "clock-frequency", &value);
896 timing->rate = value;
998 u32 value;
1000 err = of_property_read_u32(np, "nvidia,ram-code", &value);
1001 if (err || (value != ram_code))
1023 * - min_rate: Writing a value to this file sets the given frequency as the
1028 * - max_rate: Similarily to the min_rate file, writing a value to this file
1030 * the value is lower than the currently configured EMC frequency, this