Lines Matching refs:target_volt
453 * @target_volt: new voltage which is chosen to be final
461 unsigned long target_volt)
465 if (dmc->curr_volt <= target_volt)
468 ret = regulator_set_voltage(dmc->vdd_mif, target_volt,
469 target_volt);
471 dmc->curr_volt = target_volt;
479 * @target_volt: new voltage which is chosen to be final
487 unsigned long target_volt)
491 if (dmc->curr_volt >= target_volt)
494 ret = regulator_set_voltage(dmc->vdd_mif, target_volt,
495 target_volt);
497 dmc->curr_volt = target_volt;
526 * @target_volt: new voltage which is going to be set as a final
536 unsigned long target_volt)
545 ret = exynos5_dmc_align_bypass_voltage(dmc, target_volt);
569 * @target_volt: requested voltage which corresponds to the new frequency
590 unsigned long target_volt)
595 target_volt);
632 ret = exynos5_dmc_align_target_voltage(dmc, target_volt);
649 * @target_volt: returned voltage which corresponds to the returned
655 * 'target_volt' or returns error value when OPP framework fails.
660 unsigned long *target_volt, u32 flags)
669 *target_volt = dev_pm_opp_get_voltage(opp);
692 unsigned long target_volt = 0;
695 ret = exynos5_dmc_get_volt_freq(dmc, freq, &target_rate, &target_volt,
706 ret = exynos5_dmc_change_freq_and_volt(dmc, target_rate, target_volt);
1262 unsigned long target_volt = 0;
1302 &target_volt, 0);
1306 dmc->curr_volt = target_volt;