Lines Matching refs:ret
692 int div, ret;
725 ret = 0;
726 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG2, 0, 3, 0, t->cs_on,
728 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG2, 8, 12, 0, t->cs_rd_off,
730 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG2, 16, 20, 0, t->cs_wr_off,
732 if (ret)
735 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 0, 3, 0, t->adv_on,
737 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 8, 12, 0, t->adv_rd_off,
739 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 16, 20, 0, t->adv_wr_off,
741 if (ret)
745 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 4, 6, 0,
748 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 24, 26, 0,
751 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 28, 30, 0,
754 if (ret)
758 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 0, 3, 0, t->oe_on,
760 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 8, 12, 0, t->oe_off,
763 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 4, 6, 0,
766 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 13, 15, 0,
770 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 16, 19, 0, t->we_on,
772 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 24, 28, 0, t->we_off,
774 if (ret)
777 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG5, 0, 4, 0, t->rd_cycle,
779 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG5, 8, 12, 0, t->wr_cycle,
781 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG5, 16, 20, 0, t->access,
783 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG5, 24, 27, 0,
786 if (ret)
789 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG6, 0, 3, 0,
792 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG6, 8, 11, 0,
795 if (ret)
799 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG6, 16, 19, 0,
802 if (ret)
806 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG6, 24, 28, 0,
809 if (ret)
818 ret = 0;
819 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG1, 18, 19,
823 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG1, 25, 26,
827 if (ret)
1207 int ret;
1222 ret = gpmc_cs_program_settings(cs, &gpmc_s);
1223 if (ret < 0)
1224 return ret;
1915 int ret;
1934 ret = gpmc_cs_delete_mem(cs);
1935 if (ret < 0)
1936 return ret;
1938 ret = gpmc_cs_insert_mem(cs, base, size);
1939 if (ret < 0)
1940 return ret;
1942 ret = gpmc_cs_set_memconf(cs, base, size);
1944 return ret;
2078 int ret, cs;
2104 ret = gpmc_cs_request(cs, resource_size(&res), &base);
2105 if (ret < 0) {
2107 return ret;
2138 ret = gpmc_cs_remap(cs, res.start);
2139 if (ret < 0) {
2159 ret = -EINVAL;
2169 ret = -EINVAL;
2188 ret = -EINVAL;
2196 ret = of_property_read_u32(child, "bank-width",
2198 if (ret < 0 && !gpmc_s.device_width) {
2216 ret = PTR_ERR(waitpin_desc);
2223 ret = gpmc_cs_program_settings(cs, &gpmc_s);
2224 if (ret < 0)
2227 ret = gpmc_cs_set_timings(cs, &gpmc_t, &gpmc_s);
2228 if (ret) {
2259 ret = -ENODEV;
2266 return ret;
2271 int ret;
2278 ret = of_property_read_u32(pdev->dev.of_node, "gpmc,num-cs",
2280 if (ret < 0) {
2282 return ret;
2292 ret = of_property_read_u32(pdev->dev.of_node, "gpmc,num-waitpins",
2294 if (ret < 0) {
2296 return ret;
2304 int ret;
2308 ret = gpmc_probe_generic_child(pdev, child);
2309 if (ret) {
2311 child, ret);
2365 int ret;
2378 ret = devm_gpiochip_add_data(gpmc->dev, &gpmc->gpio_chip, NULL);
2379 if (ret < 0) {
2380 dev_err(gpmc->dev, "could not register gpio chip: %d\n", ret);
2381 return ret;