Lines Matching refs:reg_w
50 static void reg_w(struct sd *sd, u16 index, u16 value);
93 /* We don't use reg_w here, as that would cause all writes when
158 reg_w(sd, 0x39, 0x0010); /* JPEG clock enable */
163 reg_w(sd, 0x40 + i, a);
164 reg_w(sd, 0x60 + i, b);
166 reg_w(sd, 0x39, 0x0012); /* JPEG encoder enable */
343 reg_w(sd, 0x00, 0xff00); /* power-down */
344 reg_w(sd, 0x00, 0xbf17); /* reset everything */
345 reg_w(sd, 0x00, 0xbf10); /* normal operation */
346 reg_w(sd, 0x01, 0x0010); /* serial bus, SDS high */
347 reg_w(sd, 0x01, 0x0000); /* serial bus, SDS low */
348 reg_w(sd, 0x01, 0x0010); /* ..high 'beep-beep' */
349 reg_w(sd, 0x01, 0x0030); /* Set sda scl to FSB mode */
364 reg_w(sd, 0x00, 0xff00); /* power off */
365 reg_w(sd, 0x00, 0xbf10); /* power on */
367 reg_w(sd, 0x03, 0x405d); /* DRAM timings */
368 reg_w(sd, 0x04, 0x0030); /* SDRAM timings */
370 reg_w(sd, 0x20, y0 & 0xffff); /* Y buf.0, low */
371 reg_w(sd, 0x21, y0 >> 16); /* Y buf.0, high */
372 reg_w(sd, 0x24, u0 & 0xffff); /* U buf.0, low */
373 reg_w(sd, 0x25, u0 >> 16); /* U buf.0, high */
374 reg_w(sd, 0x28, v0 & 0xffff); /* V buf.0, low */
375 reg_w(sd, 0x29, v0 >> 16); /* V buf.0, high */
377 reg_w(sd, 0x22, y1 & 0xffff); /* Y buf.1, low */
378 reg_w(sd, 0x23, y1 >> 16); /* Y buf.1, high */
379 reg_w(sd, 0x26, u1 & 0xffff); /* U buf.1, low */
380 reg_w(sd, 0x27, u1 >> 16); /* U buf.1, high */
381 reg_w(sd, 0x2a, v1 & 0xffff); /* V buf.1, low */
382 reg_w(sd, 0x2b, v1 >> 16); /* V buf.1, high */
384 reg_w(sd, 0x32, y1 & 0xffff); /* JPEG buf 0 low */
385 reg_w(sd, 0x33, y1 >> 16); /* JPEG buf 0 high */
387 reg_w(sd, 0x34, y1 & 0xffff); /* JPEG buf 1 low */
388 reg_w(sd, 0x35, y1 >> 16); /* JPEG bug 1 high */
390 reg_w(sd, 0x36, 0x0000);/* JPEG restart interval */
391 reg_w(sd, 0x37, 0x0804);/*JPEG VLE FIFO threshold*/
392 reg_w(sd, 0x38, 0x0000);/* disable hw up-scaling */
393 reg_w(sd, 0x3f, 0x0000); /* JPEG/MCTL test data */
445 reg_w(sd, 0x10, start_cropx + x);
446 reg_w(sd, 0x11, start_cropy + y);
447 reg_w(sd, 0x12, start_cropx + x + cw);
448 reg_w(sd, 0x13, start_cropy + y + ch);
457 reg_w(sd, 0x14, sd->gspca_dev.pixfmt.width);
458 reg_w(sd, 0x15, sd->gspca_dev.pixfmt.height);
461 reg_w(sd, 0x30, sd->gspca_dev.pixfmt.width);
462 reg_w(sd, 0x31, sd->gspca_dev.pixfmt.height);
467 reg_w(sd, 0x2c, sd->gspca_dev.pixfmt.width / 2);
468 reg_w(sd, 0x2d, sd->gspca_dev.pixfmt.width / 4);
470 reg_w(sd, 0x2c, sd->gspca_dev.pixfmt.width);
472 reg_w(sd, 0x00, 0xbf17); /* reset everything */
473 reg_w(sd, 0x00, 0xbf10); /* normal operation */
477 reg_w(sd, 0x3d, val & 0xffff); /* low bits */
478 reg_w(sd, 0x3e, val >> 16); /* high bits */
519 reg_w(sd, 0x16, val);
527 reg_w(sd, 0x39, 0x0000); /* disable JPEG encoder */
528 reg_w(sd, 0x16, 0x0000); /* stop video capture */