Lines Matching defs:reg01
55 u8 reg01;
2174 u8 reg01, reg17;
2209 reg01 = sn9c1xx[1];
2211 reg01 ^= S_PDN_INV; /* power down inverted */
2212 reg_w1(gspca_dev, 0x01, reg01);
2215 reg0102[0] = reg01;
2253 reg01 = SCL_SEL_OD | S_PDN_INV;
2258 reg01 |= SYS_SEL_48M;
2259 reg_w1(gspca_dev, 0x01, reg01);
2262 reg01 &= ~S_PWR_DN; /* sensor power on */
2263 reg_w1(gspca_dev, 0x01, reg01);
2264 reg01 &= ~SCL_SEL_OD; /* remove open-drain mode */
2265 reg_w1(gspca_dev, 0x01, reg01);
2273 reg_w1(gspca_dev, 0x01, reg01);
2363 reg01 |= SYS_SEL_48M | V_TX_EN;
2376 reg01 &= ~SYS_SEL_48M; /* 640x480: clk 24Mhz */
2385 reg01 &= ~SYS_SEL_48M; /* clk 24Mz */
2399 reg01 &= ~SYS_SEL_48M; /* clk 24Mz */
2475 reg_w1(gspca_dev, 0x01, reg01);
2476 sd->reg01 = reg01;
2496 u8 reg01;
2499 reg01 = sd->reg01;
2506 reg01 |= LED;
2507 reg_w1(gspca_dev, 0x01, reg01);
2508 reg01 &= ~(LED | V_TX_EN);
2509 reg_w1(gspca_dev, 0x01, reg01);
2513 reg01 &= ~V_TX_EN;
2514 reg_w1(gspca_dev, 0x01, reg01);
2519 reg01 &= ~V_TX_EN;
2520 reg_w1(gspca_dev, 0x01, reg01);
2527 reg01 &= ~V_TX_EN;
2528 reg_w1(gspca_dev, 0x01, reg01);
2532 reg01 &= ~V_TX_EN;
2533 reg_w1(gspca_dev, 0x01, reg01);
2537 reg01 &= ~V_TX_EN;
2538 reg_w1(gspca_dev, 0x01, reg01);
2545 reg01 |= SCL_SEL_OD;
2546 reg_w1(gspca_dev, 0x01, reg01);
2547 reg01 |= S_PWR_DN; /* sensor power down */
2548 reg_w1(gspca_dev, 0x01, reg01);
2550 reg01 &= ~SYS_SEL_48M; /* clock 24MHz */
2551 reg_w1(gspca_dev, 0x01, reg01);
2552 reg01 |= LED;
2553 reg_w1(gspca_dev, 0x01, reg01);