Lines Matching defs:state
11 int mxl111sf_init_tuner_demod(struct mxl111sf_state *state)
39 return mxl111sf_ctrl_program_regs(state, mxl_111_overwrite_default);
42 int mxl1x1sf_soft_reset(struct mxl111sf_state *state)
47 ret = mxl111sf_write_reg(state, 0xff, 0x00); /* AIC */
50 ret = mxl111sf_write_reg(state, 0x02, 0x01); /* get out of reset */
56 int mxl1x1sf_set_device_mode(struct mxl111sf_state *state, int mode)
64 ret = mxl111sf_write_reg(state, 0x03,
69 ret = mxl111sf_write_reg_mask(state,
78 state->device_mode = mode;
84 int mxl1x1sf_top_master_ctrl(struct mxl111sf_state *state, int onoff)
88 return mxl111sf_write_reg(state, 0x01, onoff ? 0x01 : 0x00);
91 int mxl111sf_disable_656_port(struct mxl111sf_state *state)
95 return mxl111sf_write_reg_mask(state, 0x12, 0x04, 0x00);
98 int mxl111sf_enable_usb_output(struct mxl111sf_state *state)
102 return mxl111sf_write_reg_mask(state, 0x17, 0x40, 0x00);
106 int mxl111sf_config_mpeg_in(struct mxl111sf_state *state,
120 ret = mxl111sf_write_reg(state, V6_PIN_MUX_MODE_REG, V6_ENABLE_PIN_MUX);
124 mxl111sf_read_reg(state, V6_MPEG_IN_CLK_INV_REG, &mode);
131 ret = mxl111sf_write_reg(state, V6_MPEG_IN_CLK_INV_REG, mode);
136 ret = mxl111sf_read_reg(state, V6_MPEG_IN_CTRL_REG, &mode);
155 ret = mxl111sf_read_reg(state,
165 ret = mxl111sf_write_reg(state,
183 ret = mxl111sf_write_reg(state, V6_MPEG_IN_CTRL_REG, mode);
189 int mxl111sf_init_i2s_port(struct mxl111sf_state *state, u8 sample_size)
209 ret = mxl111sf_ctrl_program_regs(state, init_i2s);
213 ret = mxl111sf_write_reg(state, V6_I2S_NUM_SAMPLES_REG, sample_size);
219 int mxl111sf_disable_i2s_port(struct mxl111sf_state *state)
228 return mxl111sf_ctrl_program_regs(state, disable_i2s);
231 int mxl111sf_config_i2s(struct mxl111sf_state *state,
239 ret = mxl111sf_read_reg(state, V6_I2S_STREAM_START_BIT_REG, &tmp);
245 ret = mxl111sf_write_reg(state, V6_I2S_STREAM_START_BIT_REG, tmp);
249 ret = mxl111sf_read_reg(state, V6_I2S_STREAM_END_BIT_REG, &tmp);
255 ret = mxl111sf_write_reg(state, V6_I2S_STREAM_END_BIT_REG, tmp);
261 int mxl111sf_config_spi(struct mxl111sf_state *state, int onoff)
268 ret = mxl111sf_write_reg(state, 0x00, 0x02);
272 ret = mxl111sf_read_reg(state, V8_SPI_MODE_REG, &val);
281 ret = mxl111sf_write_reg(state, V8_SPI_MODE_REG, val);
285 ret = mxl111sf_write_reg(state, 0x00, 0x00);
291 int mxl111sf_idac_config(struct mxl111sf_state *state,
315 ret = mxl111sf_write_reg(state, V6_IDAC_HYSTERESIS_REG,
320 ret = mxl111sf_write_reg(state, V6_IDAC_SETTINGS_REG, val);