Lines Matching defs:MXL_ControlWrite
299 static u16 MXL_ControlWrite(struct dvb_frontend *fe, u16 ControlNum, u32 value);
363 MXL_ControlWrite(fe, SEQ_FSM_PULSE, 0);
364 MXL_ControlWrite(fe, SEQ_EXTPOWERUP, 1);
365 MXL_ControlWrite(fe, IF_DIVVAL, 8);
380 MXL_ControlWrite(fe, SEQ_FSM_PULSE, 1);
381 MXL_ControlWrite(fe, IF_DIVVAL, IfDivval);
1758 status += MXL_ControlWrite(fe, OVERRIDE_1, 1);
1759 status += MXL_ControlWrite(fe, OVERRIDE_2, 1);
1760 status += MXL_ControlWrite(fe, OVERRIDE_3, 1);
1761 status += MXL_ControlWrite(fe, OVERRIDE_4, 1);
1774 status += MXL_ControlWrite(fe, DN_IQTN_AMP_CUT, state->Mode ? 1 : 0);
1777 status += MXL_ControlWrite(fe, BB_MODE, state->Mode ? 0 : 1);
1778 status += MXL_ControlWrite(fe, BB_BUF, state->Mode ? 3 : 2);
1779 status += MXL_ControlWrite(fe, BB_BUF_OA, state->Mode ? 1 : 0);
1780 status += MXL_ControlWrite(fe, BB_IQSWAP, state->Mode ? 0 : 1);
1781 status += MXL_ControlWrite(fe, BB_INITSTATE_DLPF_TUNE, 0);
1787 status += MXL_ControlWrite(fe, BB_DLPF_BANDSEL, 0);
1790 status += MXL_ControlWrite(fe, BB_DLPF_BANDSEL, 2);
1793 status += MXL_ControlWrite(fe,
1800 status += MXL_ControlWrite(fe, BB_ALPF_BANDSELECT,
1804 status += MXL_ControlWrite(fe, BB_ALPF_BANDSELECT,
1808 status += MXL_ControlWrite(fe, BB_ALPF_BANDSELECT,
1815 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, state->Mode ? 5 : 8);
1816 status += MXL_ControlWrite(fe,
1818 status += MXL_ControlWrite(fe, EN_CHP_LIN_B, state->Mode ? 0 : 0);
1822 status += MXL_ControlWrite(fe, AGC_IF, 15);
1823 status += MXL_ControlWrite(fe, AGC_RF, 15);
1825 status += MXL_ControlWrite(fe, AGC_RF, state->Mode ? 15 : 12);
1828 status += MXL_ControlWrite(fe, AGC_IF, 0x0);
1831 status += MXL_ControlWrite(fe, AGC_IF, 0x1);
1834 status += MXL_ControlWrite(fe, AGC_IF, 0x2);
1837 status += MXL_ControlWrite(fe, AGC_IF, 0x3);
1840 status += MXL_ControlWrite(fe, AGC_IF, 0x4);
1843 status += MXL_ControlWrite(fe, AGC_IF, 0x5);
1846 status += MXL_ControlWrite(fe, AGC_IF, 0x6);
1849 status += MXL_ControlWrite(fe, AGC_IF, 0x7);
1852 status += MXL_ControlWrite(fe, AGC_IF, 0x9);
1855 status += MXL_ControlWrite(fe, AGC_IF, 0xA);
1858 status += MXL_ControlWrite(fe, AGC_IF, 0xB);
1861 status += MXL_ControlWrite(fe, AGC_IF, 0xC);
1864 status += MXL_ControlWrite(fe, AGC_IF, 0xD);
1867 status += MXL_ControlWrite(fe, AGC_IF, 0xE);
1870 status += MXL_ControlWrite(fe, AGC_IF, 0xF);
1877 status += MXL_ControlWrite(fe, DRV_RES_SEL, 6);
1878 status += MXL_ControlWrite(fe, I_DRIVER, 2);
1881 status += MXL_ControlWrite(fe, DRV_RES_SEL, 4);
1882 status += MXL_ControlWrite(fe, I_DRIVER, 1);
1890 status += MXL_ControlWrite(fe, EN_AAF, 1);
1891 status += MXL_ControlWrite(fe, EN_3P, 1);
1892 status += MXL_ControlWrite(fe, EN_AUX_3P, 1);
1893 status += MXL_ControlWrite(fe, SEL_AAF_BAND, 0);
1897 status += MXL_ControlWrite(fe, EN_AAF, 1);
1898 status += MXL_ControlWrite(fe, EN_3P, 1);
1899 status += MXL_ControlWrite(fe, EN_AUX_3P, 1);
1900 status += MXL_ControlWrite(fe, SEL_AAF_BAND, 1);
1903 status += MXL_ControlWrite(fe, EN_AAF, 0);
1904 status += MXL_ControlWrite(fe, EN_3P, 1);
1905 status += MXL_ControlWrite(fe, EN_AUX_3P, 1);
1906 status += MXL_ControlWrite(fe, SEL_AAF_BAND, 1);
1910 status += MXL_ControlWrite(fe, EN_AAF, 1);
1911 status += MXL_ControlWrite(fe, EN_3P, 1);
1912 status += MXL_ControlWrite(fe, EN_AUX_3P, 1);
1913 status += MXL_ControlWrite(fe, SEL_AAF_BAND, 0);
1916 status += MXL_ControlWrite(fe, EN_AAF, 0);
1917 status += MXL_ControlWrite(fe, EN_3P, 0);
1918 status += MXL_ControlWrite(fe, EN_AUX_3P, 0);
1919 status += MXL_ControlWrite(fe, SEL_AAF_BAND, 0);
1925 status += MXL_ControlWrite(fe, SEQ_ENCLK16_CLK_OUT, 1);
1927 status += MXL_ControlWrite(fe, SEQ_ENCLK16_CLK_OUT, 0);
1930 status += MXL_ControlWrite(fe, SEQ_SEL4_16B, 1);
1932 status += MXL_ControlWrite(fe, SEQ_SEL4_16B, 0);
1936 status += MXL_ControlWrite(fe, XTAL_CAPSELECT, 1);
1938 status += MXL_ControlWrite(fe, XTAL_CAPSELECT, 0);
1941 status += MXL_ControlWrite(fe, IF_SEL_DBL, 1);
1943 status += MXL_ControlWrite(fe, IF_SEL_DBL, 0);
1946 status += MXL_ControlWrite(fe, RFSYN_R_DIV, 3);
1948 status += MXL_ControlWrite(fe, RFSYN_R_DIV, 0);
1952 status += MXL_ControlWrite(fe, SEQ_EXTIQFSMPULSE, 0);
1954 status += MXL_ControlWrite(fe, SEQ_EXTIQFSMPULSE, 1);
1959 status += MXL_ControlWrite(fe, TG_R_DIV,
1966 status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1);
1967 status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1);
1968 status += MXL_ControlWrite(fe, AGC_EN_RSSI, 1);
1969 status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1);
1972 status += MXL_ControlWrite(fe, RFA_RSSI_REF, 2);
1973 status += MXL_ControlWrite(fe, RFA_RSSI_REFH, 3);
1974 status += MXL_ControlWrite(fe, RFA_RSSI_REFL, 1);
1977 status += MXL_ControlWrite(fe, RFA_FLR, 0);
1978 status += MXL_ControlWrite(fe, RFA_CEIL, 12);
1988 status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1);
1989 status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1);
1990 status += MXL_ControlWrite(fe, AGC_EN_RSSI, 1);
1991 status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1);
1994 status += MXL_ControlWrite(fe, RFA_RSSI_REF, 3);
1995 status += MXL_ControlWrite(fe, RFA_RSSI_REFH, 5);
1996 status += MXL_ControlWrite(fe, RFA_RSSI_REFL, 1);
1999 status += MXL_ControlWrite(fe, RFA_FLR, 2);
2000 status += MXL_ControlWrite(fe, RFA_CEIL, 13);
2002 status += MXL_ControlWrite(fe, BB_IQSWAP, 0);
2004 status += MXL_ControlWrite(fe, BB_IQSWAP, 1);
2011 status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1);
2012 status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1);
2013 status += MXL_ControlWrite(fe, AGC_EN_RSSI, 1);
2014 status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1);
2017 status += MXL_ControlWrite(fe, RFA_RSSI_REF, 2);
2018 status += MXL_ControlWrite(fe, RFA_RSSI_REFH, 4);
2019 status += MXL_ControlWrite(fe, RFA_RSSI_REFL, 1);
2022 status += MXL_ControlWrite(fe, RFA_FLR, 2);
2023 status += MXL_ControlWrite(fe, RFA_CEIL, 13);
2024 status += MXL_ControlWrite(fe, BB_INITSTATE_DLPF_TUNE, 1);
2026 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 5);
2029 status += MXL_ControlWrite(fe, BB_IQSWAP, 0);
2031 status += MXL_ControlWrite(fe, BB_IQSWAP, 1);
2039 status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1);
2040 status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1);
2041 status += MXL_ControlWrite(fe, AGC_EN_RSSI, 0);
2042 status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1);
2045 status += MXL_ControlWrite(fe, RFA_RSSI_REFH, 5);
2046 status += MXL_ControlWrite(fe, RFA_RSSI_REF, 3);
2047 status += MXL_ControlWrite(fe, RFA_RSSI_REFL, 2);
2049 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 3);
2052 status += MXL_ControlWrite(fe, BB_IQSWAP, 0);
2054 status += MXL_ControlWrite(fe, BB_IQSWAP, 1);
2055 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 2);
2065 status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1);
2066 status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1);
2067 status += MXL_ControlWrite(fe, AGC_EN_RSSI, 0);
2068 status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1);
2070 status += MXL_ControlWrite(fe, AGC_IF, 1);
2071 status += MXL_ControlWrite(fe, AGC_RF, 15);
2072 status += MXL_ControlWrite(fe, BB_IQSWAP, 1);
2080 status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1);
2081 status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1);
2082 status += MXL_ControlWrite(fe, AGC_EN_RSSI, 1);
2083 status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1);
2086 status += MXL_ControlWrite(fe, RFA_RSSI_REFH, 5);
2087 status += MXL_ControlWrite(fe, RFA_RSSI_REF, 3);
2088 status += MXL_ControlWrite(fe, RFA_RSSI_REFL, 2);
2089 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 3);
2090 status += MXL_ControlWrite(fe, BB_IQSWAP, 1);
2095 status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1);
2096 status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1);
2097 status += MXL_ControlWrite(fe, AGC_EN_RSSI, 0);
2098 status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1);
2121 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
2122 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C);
2126 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
2127 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2131 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x10);
2132 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C);
2136 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x10);
2137 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2141 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
2142 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C);
2146 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
2147 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C);
2151 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
2152 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C);
2156 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
2157 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C);
2164 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x10);
2165 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2169 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
2170 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2174 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
2175 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2179 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04);
2180 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2184 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04);
2185 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2189 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04);
2190 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2194 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04);
2195 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2199 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04);
2200 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2204 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x07);
2205 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2209 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x09);
2210 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2214 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x06);
2215 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2219 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x06);
2220 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2224 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x05);
2225 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2229 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x10);
2230 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2234 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
2235 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2239 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
2240 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2244 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04);
2245 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2249 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04);
2250 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2254 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04);
2255 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2259 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x07);
2260 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2264 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x07);
2265 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C);
2269 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x07);
2270 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C);
2274 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x09);
2275 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2279 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x09);
2280 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2284 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x06);
2285 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2289 status += MXL_ControlWrite(fe, IF_DIVVAL, 0x05);
2290 status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
2297 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_IF, intModVal);
2303 status += MXL_ControlWrite(fe, CHCAL_FRAC_MOD_IF, fracModVal);
2343 status += MXL_ControlWrite(fe, DN_POLY, 2);
2344 status += MXL_ControlWrite(fe, DN_RFGAIN, 3);
2345 status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 423);
2346 status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 1);
2347 status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 1);
2350 status += MXL_ControlWrite(fe, DN_POLY, 3);
2351 status += MXL_ControlWrite(fe, DN_RFGAIN, 3);
2352 status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 222);
2353 status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 1);
2354 status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 1);
2357 status += MXL_ControlWrite(fe, DN_POLY, 3);
2358 status += MXL_ControlWrite(fe, DN_RFGAIN, 3);
2359 status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 147);
2360 status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 1);
2361 status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 2);
2364 status += MXL_ControlWrite(fe, DN_POLY, 3);
2365 status += MXL_ControlWrite(fe, DN_RFGAIN, 3);
2366 status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 9);
2367 status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 1);
2368 status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 2);
2371 status += MXL_ControlWrite(fe, DN_POLY, 3);
2372 status += MXL_ControlWrite(fe, DN_RFGAIN, 3);
2373 status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 0);
2374 status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 1);
2375 status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 3);
2378 status += MXL_ControlWrite(fe, DN_POLY, 3);
2379 status += MXL_ControlWrite(fe, DN_RFGAIN, 1);
2380 status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 0);
2381 status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 0);
2382 status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 3);
2385 status += MXL_ControlWrite(fe, DN_POLY, 3);
2386 status += MXL_ControlWrite(fe, DN_RFGAIN, 2);
2387 status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 0);
2388 status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 0);
2389 status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 3);
2397 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
2398 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
2401 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
2402 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
2405 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
2406 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
2409 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
2410 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
2413 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
2414 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
2417 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
2418 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
2421 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
2422 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
2425 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
2426 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
2429 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
2430 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
2433 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
2434 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
2437 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
2438 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
2441 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
2442 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
2445 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
2446 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
2449 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
2450 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
2453 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 10);
2454 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 1);
2457 status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 10);
2458 status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 1);
2477 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 1);
2478 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 0);
2479 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
2480 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
2481 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
2482 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 1);
2490 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 1);
2491 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 0);
2492 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
2493 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
2494 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
2495 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 1);
2503 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
2504 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
2505 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
2506 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
2507 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
2508 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 1);
2516 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
2517 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
2518 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
2519 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
2520 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
2521 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 1);
2529 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
2530 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
2531 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
2532 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
2533 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
2534 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 2);
2542 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
2543 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
2544 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
2545 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
2546 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
2547 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 2);
2555 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
2556 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
2557 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
2558 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
2559 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
2560 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 4);
2568 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 1);
2569 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 0);
2570 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
2571 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
2572 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
2573 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0);
2581 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 1);
2582 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 0);
2583 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
2584 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
2585 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 2);
2586 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0);
2594 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
2595 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
2596 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
2597 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 1);
2598 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
2599 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0);
2607 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
2608 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
2609 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
2610 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 1);
2611 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
2612 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0);
2625 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, E3);
2629 MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, E4);
2636 status += MXL_ControlWrite(fe, CHCAL_FRAC_MOD_RF, E5);
2640 status += MXL_ControlWrite(fe, RFSYN_LPF_R, E5A);
2643 status += MXL_ControlWrite(fe, CHCAL_EN_INT_RF, ((E5 == 0) ? 1 : 0));
2645 * status += MXL_ControlWrite(fe, CHCAL_EN_INT_RF, 1);
2647 * status += MXL_ControlWrite(fe, CHCAL_FRAC_MOD_RF, E5);
2665 status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x6);
2666 status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x0);
2674 status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x1);
2675 status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x0);
2683 status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0xC);
2684 status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x2);
2692 status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x8);
2693 status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x2);
2701 status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x0);
2702 status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x2);
2710 status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x8);
2711 status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x3);
2719 status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x0);
2720 status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x3);
2728 status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x8);
2729 status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x7);
2737 status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x0);
2738 status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x7);
2747 status += MXL_ControlWrite(fe, TG_DIV_VAL, tg_divval);
2750 status += MXL_ControlWrite(fe, TG_DIV_VAL, tg_divval + 1);
2783 status += MXL_ControlWrite(fe, TG_VCO_BIAS , tg_lo);
2788 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN,
2791 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 3);
2793 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 2);
2799 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
2800 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
2807 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
2808 status += MXL_ControlWrite(fe, DAC_DIN_A, 0);
2811 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
2812 status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
2818 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
2819 status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
2825 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
2826 status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
2832 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
2833 status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
2839 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
2840 status += MXL_ControlWrite(fe, DAC_DIN_B, 29);
2846 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
2847 status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
2853 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
2854 status += MXL_ControlWrite(fe, DAC_DIN_B, 16);
2860 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
2861 status += MXL_ControlWrite(fe, DAC_DIN_B, 7);
2867 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
2868 status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
2878 status += MXL_ControlWrite(fe, DAC_DIN_A, 0);
2881 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
2887 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
2893 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
2899 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
2905 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
2911 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
2917 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
2923 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
2929 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
2938 status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
2941 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
2947 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
2953 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
2959 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
2965 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
2971 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
2977 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
2987 status += MXL_ControlWrite(fe, DAC_DIN_A, 0);
2996 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
2997 status += MXL_ControlWrite(fe, AGC_IF, 10);
3003 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
3010 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
3017 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
3024 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
3031 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
3038 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
3045 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
3052 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
3059 status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
3069 status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
3072 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3078 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3084 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3090 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3096 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3102 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
3108 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
3118 status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
3121 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3127 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3133 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3139 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3145 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3151 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
3157 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
3167 status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
3170 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3176 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3182 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3188 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3194 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3200 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
3206 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
3216 status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
3220 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3226 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3232 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3238 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3244 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
3250 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3256 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
3262 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
3272 status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
3282 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3285 status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1);
3286 status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1);
3287 status += MXL_ControlWrite(fe, AGC_EN_RSSI, 1);
3288 status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1);
3291 status += MXL_ControlWrite(fe, RFA_RSSI_REFH, 5);
3292 status += MXL_ControlWrite(fe, RFA_RSSI_REF, 3);
3293 status += MXL_ControlWrite(fe, RFA_RSSI_REFL, 2);
3297 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 3);
3302 status += MXL_ControlWrite(fe, AGC_EN_RSSI, 0);
3305 status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 5);
3310 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3316 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3322 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3328 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3334 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
3340 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
3346 status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
3361 status += MXL_ControlWrite(fe, GPIO_1B, GPIO_Val ? 0 : 1);
3367 status += MXL_ControlWrite(fe, GPIO_3, 0);
3368 status += MXL_ControlWrite(fe, GPIO_3B, 0);
3371 status += MXL_ControlWrite(fe, GPIO_3, 1);
3372 status += MXL_ControlWrite(fe, GPIO_3B, 1);
3375 status += MXL_ControlWrite(fe, GPIO_3, 0);
3376 status += MXL_ControlWrite(fe, GPIO_3B, 1);
3381 status += MXL_ControlWrite(fe, GPIO_4, 0);
3382 status += MXL_ControlWrite(fe, GPIO_4B, 0);
3385 status += MXL_ControlWrite(fe, GPIO_4, 1);
3386 status += MXL_ControlWrite(fe, GPIO_4B, 1);
3389 status += MXL_ControlWrite(fe, GPIO_4, 0);
3390 status += MXL_ControlWrite(fe, GPIO_4B, 1);
3397 static u16 MXL_ControlWrite(struct dvb_frontend *fe, u16 ControlNum, u32 value)
3685 status += MXL_ControlWrite(fe, RFSYN_EN_DIV, 1);
3686 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
3687 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
3688 status += MXL_ControlWrite(fe, RFSYN_DIVM, 1);
3689 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
3690 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
3691 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0);
3694 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
3695 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8);
3696 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 56);
3697 status += MXL_ControlWrite(fe,
3702 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
3703 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8);
3704 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 56);
3705 status += MXL_ControlWrite(fe,
3709 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
3710 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8);
3711 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 56);
3712 status += MXL_ControlWrite(fe,
3718 status += MXL_ControlWrite(fe, RFSYN_EN_DIV, 1);
3719 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
3720 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
3721 status += MXL_ControlWrite(fe, RFSYN_DIVM, 1);
3722 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
3723 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
3724 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0);
3725 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
3726 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40);
3727 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 41);
3730 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
3731 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40);
3732 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 42);
3733 status += MXL_ControlWrite(fe,
3738 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
3739 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40);
3740 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 42);
3741 status += MXL_ControlWrite(fe,
3745 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
3746 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40);
3747 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 41);
3748 status += MXL_ControlWrite(fe,
3754 status += MXL_ControlWrite(fe, RFSYN_EN_DIV, 1);
3755 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
3756 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
3757 status += MXL_ControlWrite(fe, RFSYN_DIVM, 1);
3758 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
3759 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
3760 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0);
3761 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
3762 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8);
3763 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 42);
3766 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
3767 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8);
3768 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 44);
3769 status += MXL_ControlWrite(fe,
3774 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
3775 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8);
3776 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 44);
3777 status += MXL_ControlWrite(fe,
3781 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
3782 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8);
3783 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 42);
3784 status += MXL_ControlWrite(fe,
3790 status += MXL_ControlWrite(fe, RFSYN_EN_DIV, 1);
3791 status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
3792 status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
3793 status += MXL_ControlWrite(fe, RFSYN_DIVM, 1);
3794 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
3795 status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
3796 status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0);
3797 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
3798 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40);
3799 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 27);
3802 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
3803 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40);
3804 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 27);
3805 status += MXL_ControlWrite(fe,
3810 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
3811 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40);
3812 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 27);
3813 status += MXL_ControlWrite(fe,
3817 status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
3818 status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40);
3819 status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 27);
3820 status += MXL_ControlWrite(fe,
3834 status += MXL_ControlWrite(fe, DN_BYPASS_AGC_I2C, 1);