Lines Matching refs:LO1
496 /* Exclude LO1 FracN */
522 /* Exclude LO1 values that conflict with DECT channels */
715 /* Check out all multiples of LO1 from n0 to m_maxLOSpurHarmonic */
783 * Checks for existing spurs in present LO1, LO2 freqs
784 * and if present, chooses spur-free LO1, LO2 combination
813 u32 zfLO1 = pAS_Info->f_LO1; /* current attempt at an LO1 freq */
882 #define MT2063_LO1_FRACN_AVOID (0UL) /* LO1 FracN numerator avoid region (in Hz) */
890 #define MT2063_MIN_UPC_FREQ (1396000000UL) /* Minimum LO1 frequency (in Hz) */
891 #define MT2063_MAX_UPC_FREQ (2750000000UL) /* Maximum LO1 frequency (in Hz) */
902 * mt2063_lockStatus - Checks to see if LO1 and LO2 are locked
1512 u32 LO1; /* 1st LO register value */
1513 u32 Num1; /* Numerator for LO1 reg. value */
1520 const u8 LO1LK = 0x80; /* Mask for LO1 Lock bit */
1535 * Save original LO1 and LO2 register values
1574 /* Request a 1st IF such that LO1 is on a step size */
1582 * desired LO1 frequency
1602 * MT_AvoidSpurs spurs may have changed the LO1 & LO2 values.
1607 MT2063_CalcLO1Mult(&LO1, &Num1, state->AS_Data.f_LO1,
1656 state->reg[MT2063_REG_LO1CQ_1] = (u8) (LO1 & 0xFF); /* DIV1q */