Lines Matching defs:LO2
512 /* Exclude LO2 FracN */
783 * Checks for existing spurs in present LO1, LO2 freqs
784 * and if present, chooses spur-free LO1, LO2 combination
814 u32 zfLO2 = pAS_Info->f_LO2; /* current attempt at an LO2 freq */
883 #define MT2063_LO2_FRACN_AVOID (199999UL) /* LO2 FracN numerator avoid region (in Hz) */
888 #define MT2063_MIN_DNC_FREQ (1293000000UL) /* Minimum LO2 frequency (in Hz) */
889 #define MT2063_MAX_DNC_FREQ (1614000000UL) /* Maximum LO2 frequency (in Hz) */
902 * mt2063_lockStatus - Checks to see if LO1 and LO2 are locked
920 /* LO2 Lock bit was in a different place for B0 version */
1515 u32 LO2; /* 2nd LO register value */
1516 u32 Num2; /* Numerator for LO2 reg. value */
1521 u8 LO2LK = 0x08; /* Mask for LO2 Lock bit */
1535 * Save original LO1 and LO2 register values
1602 * MT_AvoidSpurs spurs may have changed the LO1 & LO2 values.
1613 MT2063_CalcLO2Mult(&LO2, &Num2, state->AS_Data.f_LO2,
1625 /* LO2 Lock bit was in a different place for B0 version */
1658 state->reg[MT2063_REG_LO2CQ_1] = (u8) (((LO2 & 0x7F) << 1) /* DIV2q */