Lines Matching refs:base
95 void __iomem *base;
114 status = readl(ir->base + SUNXI_IR_RXSTA_REG);
117 writel(status | REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
127 dt = readb(ir->base + SUNXI_IR_RXFIFO_REG);
202 dev_err(dev, "set ir base clock failed!\n");
205 dev_dbg(dev, "set base clock frequency to %d Hz.\n", b_clk_freq);
221 ir->base = devm_ioremap_resource(dev, res);
222 if (IS_ERR(ir->base)) {
223 ret = PTR_ERR(ir->base);
272 writel(REG_CTL_MD, ir->base+SUNXI_IR_CTL_REG);
276 ir->base + SUNXI_IR_CIR_REG);
279 writel(REG_RXCTL_RPPI, ir->base + SUNXI_IR_RXCTL_REG);
282 writel(REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
290 ir->base + SUNXI_IR_RXINT_REG);
293 tmp = readl(ir->base + SUNXI_IR_CTL_REG);
294 writel(tmp | REG_CTL_GEN | REG_CTL_RXEN, ir->base + SUNXI_IR_CTL_REG);
322 writel(0, ir->base + SUNXI_IR_RXINT_REG);
324 writel(REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
326 writel(0, ir->base + SUNXI_IR_CTL_REG);