Lines Matching defs:xvip
72 * @xvip: Xilinx Video IP device
89 struct xvip_device xvip;
112 return container_of(subdev, struct xtpg_device, xvip.subdev);
176 xvip_stop(&xtpg->xvip);
185 xvip_set_frame_size(&xtpg->xvip, &xtpg->formats[0]);
218 xvip_clr_and_set(&xtpg->xvip, XTPG_PATTERN_CONTROL,
238 xvip_write(&xtpg->xvip, XTPG_BAYER_PHASE, bayer_phase);
243 xvip_start(&xtpg->xvip);
259 return v4l2_subdev_get_try_format(&xtpg->xvip.subdev, cfg, pad);
377 xvip_clr_and_set(&xtpg->xvip, XTPG_PATTERN_CONTROL,
381 xvip_clr_or_set(&xtpg->xvip, XTPG_PATTERN_CONTROL,
385 xvip_clr_or_set(&xtpg->xvip, XTPG_PATTERN_CONTROL,
389 xvip_clr_and_set(&xtpg->xvip, XTPG_PATTERN_CONTROL,
395 xvip_clr_or_set(&xtpg->xvip, XTPG_PATTERN_CONTROL,
399 xvip_clr_or_set(&xtpg->xvip, XTPG_PATTERN_CONTROL,
403 xvip_clr_or_set(&xtpg->xvip, XTPG_PATTERN_CONTROL,
407 xvip_write(&xtpg->xvip, XTPG_MOTION_SPEED, ctrl->val);
410 xvip_clr_and_set(&xtpg->xvip, XTPG_CROSS_HAIRS,
415 xvip_clr_and_set(&xtpg->xvip, XTPG_CROSS_HAIRS,
420 xvip_clr_and_set(&xtpg->xvip, XTPG_ZPLATE_HOR_CONTROL,
425 xvip_clr_and_set(&xtpg->xvip, XTPG_ZPLATE_HOR_CONTROL,
430 xvip_clr_and_set(&xtpg->xvip, XTPG_ZPLATE_VER_CONTROL,
435 xvip_clr_and_set(&xtpg->xvip, XTPG_ZPLATE_VER_CONTROL,
440 xvip_write(&xtpg->xvip, XTPG_BOX_SIZE, ctrl->val);
443 xvip_write(&xtpg->xvip, XTPG_BOX_COLOR, ctrl->val);
446 xvip_write(&xtpg->xvip, XTPG_STUCK_PIXEL_THRESH, ctrl->val);
449 xvip_write(&xtpg->xvip, XTPG_NOISE_GAIN, ctrl->val);
690 xvip_suspend(&xtpg->xvip);
699 xvip_resume(&xtpg->xvip);
710 struct device *dev = xtpg->xvip.dev;
711 struct device_node *node = xtpg->xvip.dev->of_node;
778 xtpg->xvip.dev = &pdev->dev;
784 ret = xvip_init_resources(&xtpg->xvip);
802 xvip_reset(&xtpg->xvip);
818 xvip_get_frame_size(&xtpg->xvip, &xtpg->default_format);
829 subdev = &xtpg->xvip.subdev;
875 xvip_print_version(&xtpg->xvip);
890 xvip_cleanup_resources(&xtpg->xvip);
897 struct v4l2_subdev *subdev = &xtpg->xvip.subdev;
903 xvip_cleanup_resources(&xtpg->xvip);