Lines Matching refs:base
16 void exynos4_jpeg_sw_reset(void __iomem *base)
20 reg = readl(base + EXYNOS4_JPEG_CNTL_REG);
22 base + EXYNOS4_JPEG_CNTL_REG);
24 reg = readl(base + EXYNOS4_JPEG_CNTL_REG);
25 writel(reg & ~EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG);
29 writel(reg | EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG);
32 void exynos4_jpeg_set_enc_dec_mode(void __iomem *base, unsigned int mode)
36 reg = readl(base + EXYNOS4_JPEG_CNTL_REG);
41 base + EXYNOS4_JPEG_CNTL_REG);
45 base + EXYNOS4_JPEG_CNTL_REG);
48 base + EXYNOS4_JPEG_CNTL_REG);
52 void __exynos4_jpeg_set_img_fmt(void __iomem *base, unsigned int img_fmt,
67 reg = readl(base + EXYNOS4_IMG_FMT_REG) &
133 writel(reg, base + EXYNOS4_IMG_FMT_REG);
136 void __exynos4_jpeg_set_enc_out_fmt(void __iomem *base, unsigned int out_fmt,
141 reg = readl(base + EXYNOS4_IMG_FMT_REG) &
166 writel(reg, base + EXYNOS4_IMG_FMT_REG);
169 void exynos4_jpeg_set_interrupt(void __iomem *base, unsigned int version)
174 reg = readl(base + EXYNOS4_INT_EN_REG) & ~EXYNOS4_INT_EN_MASK;
175 writel(reg | EXYNOS4_INT_EN_ALL, base + EXYNOS4_INT_EN_REG);
177 reg = readl(base + EXYNOS4_INT_EN_REG) &
179 writel(reg | EXYNOS5433_INT_EN_ALL, base + EXYNOS4_INT_EN_REG);
183 unsigned int exynos4_jpeg_get_int_status(void __iomem *base)
185 return readl(base + EXYNOS4_INT_STATUS_REG);
188 unsigned int exynos4_jpeg_get_fifo_status(void __iomem *base)
190 return readl(base + EXYNOS4_FIFO_STATUS_REG);
193 void exynos4_jpeg_set_huf_table_enable(void __iomem *base, int value)
197 reg = readl(base + EXYNOS4_JPEG_CNTL_REG) & ~EXYNOS4_HUF_TBL_EN;
201 base + EXYNOS4_JPEG_CNTL_REG);
204 base + EXYNOS4_JPEG_CNTL_REG);
207 void exynos4_jpeg_set_sys_int_enable(void __iomem *base, int value)
211 reg = readl(base + EXYNOS4_JPEG_CNTL_REG) & ~(EXYNOS4_SYS_INT_EN);
214 writel(reg | EXYNOS4_SYS_INT_EN, base + EXYNOS4_JPEG_CNTL_REG);
216 writel(reg & ~EXYNOS4_SYS_INT_EN, base + EXYNOS4_JPEG_CNTL_REG);
219 void exynos4_jpeg_set_stream_buf_address(void __iomem *base,
222 writel(address, base + EXYNOS4_OUT_MEM_BASE_REG);
225 void exynos4_jpeg_set_stream_size(void __iomem *base,
228 writel(0x0, base + EXYNOS4_JPEG_IMG_SIZE_REG); /* clear */
230 base + EXYNOS4_JPEG_IMG_SIZE_REG);
233 void exynos4_jpeg_set_frame_buf_address(void __iomem *base,
236 writel(exynos4_jpeg_addr->y, base + EXYNOS4_IMG_BA_PLANE_1_REG);
237 writel(exynos4_jpeg_addr->cb, base + EXYNOS4_IMG_BA_PLANE_2_REG);
238 writel(exynos4_jpeg_addr->cr, base + EXYNOS4_IMG_BA_PLANE_3_REG);
241 void exynos4_jpeg_set_encode_tbl_select(void __iomem *base,
252 writel(reg, base + EXYNOS4_TBL_SEL_REG);
255 void exynos4_jpeg_set_dec_components(void __iomem *base, int n)
259 reg = readl(base + EXYNOS4_TBL_SEL_REG);
262 writel(reg, base + EXYNOS4_TBL_SEL_REG);
265 void exynos4_jpeg_select_dec_q_tbl(void __iomem *base, char c, char x)
269 reg = readl(base + EXYNOS4_TBL_SEL_REG);
272 writel(reg, base + EXYNOS4_TBL_SEL_REG);
275 void exynos4_jpeg_select_dec_h_tbl(void __iomem *base, char c, char x)
279 reg = readl(base + EXYNOS4_TBL_SEL_REG);
282 writel(reg, base + EXYNOS4_TBL_SEL_REG);
285 void exynos4_jpeg_set_encode_hoff_cnt(void __iomem *base, unsigned int fmt)
288 writel(0xd2, base + EXYNOS4_HUFF_CNT_REG);
290 writel(0x1a2, base + EXYNOS4_HUFF_CNT_REG);
293 unsigned int exynos4_jpeg_get_stream_size(void __iomem *base)
295 return readl(base + EXYNOS4_BITSTREAM_SIZE_REG);
298 void exynos4_jpeg_set_dec_bitstream_size(void __iomem *base, unsigned int size)
300 writel(size, base + EXYNOS4_BITSTREAM_SIZE_REG);
303 void exynos4_jpeg_get_frame_size(void __iomem *base,
306 *width = (readl(base + EXYNOS4_DECODE_XY_SIZE_REG) &
308 *height = (readl(base + EXYNOS4_DECODE_XY_SIZE_REG) >> 16) &
312 unsigned int exynos4_jpeg_get_frame_fmt(void __iomem *base)
314 return readl(base + EXYNOS4_DECODE_IMG_FMT_REG) &
318 void exynos4_jpeg_set_timer_count(void __iomem *base, unsigned int size)
320 writel(size, base + EXYNOS4_INT_TIMER_COUNT_REG);