Lines Matching refs:reg
20 u32 reg = 1;
25 while (reg != 0 && --count > 0) {
28 reg = readl(regs + EXYNOS3250_SW_RESET);
31 reg = 0;
34 while (reg != 1 && --count > 0) {
38 reg = readl(regs + EXYNOS3250_JPGDRI);
62 u32 reg;
64 reg = readl(base + EXYNOS3250_JPGCMOD) & ~EXYNOS3250_HALF_EN_MASK;
66 writel(reg | EXYNOS3250_HALF_EN, base + EXYNOS3250_JPGCMOD);
71 u32 reg;
73 reg = readl(regs + EXYNOS3250_JPGCMOD) &
78 reg |= EXYNOS3250_MODE_SEL_ARGB8888;
81 reg |= EXYNOS3250_MODE_SEL_ARGB8888 | EXYNOS3250_SRC_SWAP_RGB;
84 reg |= EXYNOS3250_MODE_SEL_RGB565;
87 reg |= EXYNOS3250_MODE_SEL_RGB565 | EXYNOS3250_SRC_SWAP_RGB;
90 reg |= EXYNOS3250_MODE_SEL_422_1P_LUM_CHR;
93 reg |= EXYNOS3250_MODE_SEL_422_1P_LUM_CHR |
97 reg |= EXYNOS3250_MODE_SEL_422_1P_CHR_LUM;
100 reg |= EXYNOS3250_MODE_SEL_422_1P_CHR_LUM |
104 reg |= EXYNOS3250_MODE_SEL_420_2P | EXYNOS3250_SRC_NV12;
107 reg |= EXYNOS3250_MODE_SEL_420_2P | EXYNOS3250_SRC_NV21;
110 reg |= EXYNOS3250_MODE_SEL_420_3P;
117 writel(reg, regs + EXYNOS3250_JPGCMOD);
122 u32 reg;
124 reg = readl(regs + EXYNOS3250_JPGCMOD);
126 reg |= EXYNOS3250_MODE_Y16;
128 reg &= ~EXYNOS3250_MODE_Y16_MASK;
129 writel(reg, regs + EXYNOS3250_JPGCMOD);
134 u32 reg, m;
140 reg = readl(regs + EXYNOS3250_JPGMOD);
141 reg &= ~EXYNOS3250_PROC_MODE_MASK;
142 reg |= m;
143 writel(reg, regs + EXYNOS3250_JPGMOD);
148 u32 reg, m = 0;
162 reg = readl(regs + EXYNOS3250_JPGMOD);
163 reg &= ~EXYNOS3250_SUBSAMPLING_MODE_MASK;
164 reg |= m;
165 writel(reg, regs + EXYNOS3250_JPGMOD);
176 u32 reg;
178 reg = dri & EXYNOS3250_JPGDRI_MASK;
179 writel(reg, regs + EXYNOS3250_JPGDRI);
184 unsigned long reg;
186 reg = readl(regs + EXYNOS3250_QHTBL);
187 reg &= ~EXYNOS3250_QT_NUM_MASK(t);
188 reg |= (n << EXYNOS3250_QT_NUM_SHIFT(t)) &
190 writel(reg, regs + EXYNOS3250_QHTBL);
195 unsigned long reg;
197 reg = readl(regs + EXYNOS3250_QHTBL);
198 reg &= ~EXYNOS3250_HT_NUM_AC_MASK(t);
200 reg |= (0 << EXYNOS3250_HT_NUM_AC_SHIFT(t)) &
202 writel(reg, regs + EXYNOS3250_QHTBL);
207 unsigned long reg;
209 reg = readl(regs + EXYNOS3250_QHTBL);
210 reg &= ~EXYNOS3250_HT_NUM_DC_MASK(t);
212 reg |= (0 << EXYNOS3250_HT_NUM_DC_SHIFT(t)) &
214 writel(reg, regs + EXYNOS3250_QHTBL);
219 u32 reg;
221 reg = y & EXYNOS3250_JPGY_MASK;
222 writel(reg, regs + EXYNOS3250_JPGY);
227 u32 reg;
229 reg = x & EXYNOS3250_JPGX_MASK;
230 writel(reg, regs + EXYNOS3250_JPGX);
247 u32 reg;
249 reg = readl(regs + EXYNOS3250_JPGINTSE);
250 reg |= (EXYNOS3250_JPEG_DONE_EN |
257 writel(reg, regs + EXYNOS3250_JPGINTSE);
262 u32 reg;
264 reg = size & EXYNOS3250_ENC_STREAM_BOUND_MASK;
265 writel(reg, regs + EXYNOS3250_ENC_STREAM_BOUND);
270 u32 reg;
274 reg = EXYNOS3250_OUT_FMT_ARGB8888;
277 reg = EXYNOS3250_OUT_FMT_ARGB8888 | EXYNOS3250_OUT_SWAP_RGB;
280 reg = EXYNOS3250_OUT_FMT_RGB565;
283 reg = EXYNOS3250_OUT_FMT_RGB565 | EXYNOS3250_OUT_SWAP_RGB;
286 reg = EXYNOS3250_OUT_FMT_422_1P_LUM_CHR;
289 reg = EXYNOS3250_OUT_FMT_422_1P_LUM_CHR |
293 reg = EXYNOS3250_OUT_FMT_422_1P_CHR_LUM;
296 reg = EXYNOS3250_OUT_FMT_422_1P_CHR_LUM |
300 reg = EXYNOS3250_OUT_FMT_420_2P | EXYNOS3250_OUT_NV12;
303 reg = EXYNOS3250_OUT_FMT_420_2P | EXYNOS3250_OUT_NV21;
306 reg = EXYNOS3250_OUT_FMT_420_3P;
309 reg = 0;
313 writel(reg, regs + EXYNOS3250_OUTFORM);
366 u32 reg;
368 reg = (y_offset << EXYNOS3250_LUMA_YY_OFFSET_SHIFT) &
370 reg |= (x_offset << EXYNOS3250_LUMA_YX_OFFSET_SHIFT) &
373 writel(reg, regs + EXYNOS3250_LUMA_XY_OFFSET);
375 reg = (y_offset << EXYNOS3250_CHROMA_YY_OFFSET_SHIFT) &
377 reg |= (x_offset << EXYNOS3250_CHROMA_YX_OFFSET_SHIFT) &
380 writel(reg, regs + EXYNOS3250_CHROMA_XY_OFFSET);
382 reg = (y_offset << EXYNOS3250_CHROMA_CR_YY_OFFSET_SHIFT) &
384 reg |= (x_offset << EXYNOS3250_CHROMA_CR_YX_OFFSET_SHIFT) &
387 writel(reg, regs + EXYNOS3250_CHROMA_CR_XY_OFFSET);