Lines Matching refs:wbclk
201 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) {
202 ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]);
211 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
212 clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
275 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
276 clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
1073 if (IS_ERR(fmd->wbclk[i]))
1075 clk_put(fmd->wbclk[i]);
1076 fmd->wbclk[i] = ERR_PTR(-EINVAL);
1110 fmd->wbclk[CLK_IDX_WB_A] = ERR_PTR(-EINVAL);
1121 fmd->wbclk[i] = clock;