Lines Matching defs:clock
188 * and the sensor clock
200 /* Enable PXLASYNC clock if this pipeline includes FIMC-IS */
219 * of all pipeline subdevs and the sensor clock
253 * __fimc_pipeline_close - disable the sensor clock and pipeline power
256 * Disable power of all subdevs and turn the external sensor clock off.
274 /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
438 * the sensor's clock frequency is needed.
1065 if (IS_ERR(fmd->camclk[i].clock))
1067 clk_put(fmd->camclk[i].clock);
1068 fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1084 struct clk *clock;
1088 fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1092 clock = clk_get(dev, clk_name);
1094 if (IS_ERR(clock)) {
1095 dev_err(dev, "Failed to get clock: %s\n", clk_name);
1096 ret = PTR_ERR(clock);
1099 fmd->camclk[i].clock = clock;
1107 * For now get only PIXELASYNCM1 clock (Writeback B/ISP),
1114 clock = clk_get(dev, clk_name);
1115 if (IS_ERR(clock)) {
1116 v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n",
1118 ret = PTR_ERR(clock);
1121 fmd->wbclk[i] = clock;
1330 "clock-output-names", i, &init.name);
1334 p_name = __clk_get_name(fmd->camclk[i].clock);
1346 dev_err(dev, "failed to register clock: %s (%ld)\n",
1496 * to enable the clock.
1500 v4l2_err(v4l2_dev, "clock provider registration failed\n");