Lines Matching defs:csi2tx
88 void (*dphy_setup)(struct csi2tx_priv *csi2tx);
175 struct csi2tx_priv *csi2tx = v4l2_subdev_to_csi2tx(subdev);
181 return &csi2tx->pad_fmts[fmt->pad];
233 static void csi2tx_dphy_set_wakeup(struct csi2tx_priv *csi2tx)
236 csi2tx->base + CSI2TX_DPHY_CLK_WAKEUP_REG);
243 static void csi2tx_dphy_init_finish(struct csi2tx_priv *csi2tx, u32 reg)
251 for (i = 0; i < csi2tx->num_lanes; i++)
252 reg |= CSI2TX_DPHY_CFG_LANE_ENABLE(csi2tx->lanes[i] - 1);
253 writel(reg, csi2tx->base + CSI2TX_DPHY_CFG_REG);
260 csi2tx->base + CSI2TX_DPHY_CFG_REG);
264 static void csi2tx_dphy_setup(struct csi2tx_priv *csi2tx)
269 csi2tx_dphy_set_wakeup(csi2tx);
273 for (i = 0; i < csi2tx->num_lanes; i++)
274 reg |= CSI2TX_DPHY_CFG_LANE_RESET(csi2tx->lanes[i] - 1);
275 writel(reg, csi2tx->base + CSI2TX_DPHY_CFG_REG);
277 csi2tx_dphy_init_finish(csi2tx, reg);
281 static void csi2tx_v2_dphy_setup(struct csi2tx_priv *csi2tx)
285 csi2tx_dphy_set_wakeup(csi2tx);
289 writel(reg, csi2tx->base + CSI2TX_V2_DPHY_CFG_REG);
291 csi2tx_dphy_init_finish(csi2tx, reg);
294 static void csi2tx_reset(struct csi2tx_priv *csi2tx)
296 writel(CSI2TX_CONFIG_SRST_REQ, csi2tx->base + CSI2TX_CONFIG_REG);
301 static int csi2tx_start(struct csi2tx_priv *csi2tx)
303 struct media_entity *entity = &csi2tx->subdev.entity;
307 csi2tx_reset(csi2tx);
309 writel(CSI2TX_CONFIG_CFG_REQ, csi2tx->base + CSI2TX_CONFIG_REG);
313 if (csi2tx->vops && csi2tx->vops->dphy_setup) {
314 csi2tx->vops->dphy_setup(csi2tx);
337 struct media_pad *pad = &csi2tx->pads[i];
349 mfmt = &csi2tx->pad_fmts[pad_idx];
364 csi2tx->base + CSI2TX_DT_CFG_REG(stream));
368 csi2tx->base + CSI2TX_DT_FORMAT_REG(stream));
375 csi2tx->base + CSI2TX_STREAM_IF_CFG_REG(stream));
379 writel(0, csi2tx->base + CSI2TX_CONFIG_REG);
384 static void csi2tx_stop(struct csi2tx_priv *csi2tx)
387 csi2tx->base + CSI2TX_CONFIG_REG);
392 struct csi2tx_priv *csi2tx = v4l2_subdev_to_csi2tx(subdev);
395 mutex_lock(&csi2tx->lock);
402 if (!csi2tx->count) {
403 ret = csi2tx_start(csi2tx);
408 csi2tx->count++;
410 csi2tx->count--;
415 if (!csi2tx->count)
416 csi2tx_stop(csi2tx);
420 mutex_unlock(&csi2tx->lock);
433 static int csi2tx_get_resources(struct csi2tx_priv *csi2tx,
441 csi2tx->base = devm_ioremap_resource(&pdev->dev, res);
442 if (IS_ERR(csi2tx->base))
443 return PTR_ERR(csi2tx->base);
445 csi2tx->p_clk = devm_clk_get(&pdev->dev, "p_clk");
446 if (IS_ERR(csi2tx->p_clk)) {
448 return PTR_ERR(csi2tx->p_clk);
451 csi2tx->esc_clk = devm_clk_get(&pdev->dev, "esc_clk");
452 if (IS_ERR(csi2tx->esc_clk)) {
454 return PTR_ERR(csi2tx->esc_clk);
457 clk_prepare_enable(csi2tx->p_clk);
458 dev_cfg = readl(csi2tx->base + CSI2TX_DEVICE_CONFIG_REG);
459 clk_disable_unprepare(csi2tx->p_clk);
461 csi2tx->max_lanes = dev_cfg & CSI2TX_DEVICE_CONFIG_LANES_MASK;
462 if (csi2tx->max_lanes > CSI2TX_LANES_MAX) {
464 csi2tx->max_lanes);
468 csi2tx->max_streams = (dev_cfg & CSI2TX_DEVICE_CONFIG_STREAMS_MASK) >> 4;
469 if (csi2tx->max_streams > CSI2TX_STREAMS_MAX) {
471 csi2tx->max_streams);
475 csi2tx->has_internal_dphy = !!(dev_cfg & CSI2TX_DEVICE_CONFIG_HAS_DPHY);
477 for (i = 0; i < csi2tx->max_streams; i++) {
481 csi2tx->pixel_clk[i] = devm_clk_get(&pdev->dev, clk_name);
482 if (IS_ERR(csi2tx->pixel_clk[i])) {
485 return PTR_ERR(csi2tx->pixel_clk[i]);
492 static int csi2tx_check_lanes(struct csi2tx_priv *csi2tx)
498 ep = of_graph_get_endpoint_by_regs(csi2tx->dev->of_node, 0, 0);
504 dev_err(csi2tx->dev, "Could not parse v4l2 endpoint\n");
509 dev_err(csi2tx->dev, "Unsupported media bus type: 0x%x\n",
515 csi2tx->num_lanes = v4l2_ep.bus.mipi_csi2.num_data_lanes;
516 if (csi2tx->num_lanes > csi2tx->max_lanes) {
517 dev_err(csi2tx->dev,
523 for (i = 0; i < csi2tx->num_lanes; i++) {
525 dev_err(csi2tx->dev, "Invalid lane[%d] number: %u\n",
532 memcpy(csi2tx->lanes, v4l2_ep.bus.mipi_csi2.data_lanes,
533 sizeof(csi2tx->lanes));
550 .compatible = "cdns,csi2tx",
554 .compatible = "cdns,csi2tx-1.3",
558 .compatible = "cdns,csi2tx-2.1",
567 struct csi2tx_priv *csi2tx;
572 csi2tx = kzalloc(sizeof(*csi2tx), GFP_KERNEL);
573 if (!csi2tx)
575 platform_set_drvdata(pdev, csi2tx);
576 mutex_init(&csi2tx->lock);
577 csi2tx->dev = &pdev->dev;
579 ret = csi2tx_get_resources(csi2tx, pdev);
584 csi2tx->vops = (struct csi2tx_vops *)of_id->data;
586 v4l2_subdev_init(&csi2tx->subdev, &csi2tx_subdev_ops);
587 csi2tx->subdev.owner = THIS_MODULE;
588 csi2tx->subdev.dev = &pdev->dev;
589 csi2tx->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
590 snprintf(csi2tx->subdev.name, V4L2_SUBDEV_NAME_SIZE, "%s.%s",
593 ret = csi2tx_check_lanes(csi2tx);
598 csi2tx->subdev.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
599 csi2tx->pads[CSI2TX_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
601 csi2tx->pads[i].flags = MEDIA_PAD_FL_SINK;
610 csi2tx->pad_fmts[i] = fmt_default;
612 ret = media_entity_pads_init(&csi2tx->subdev.entity, CSI2TX_PAD_MAX,
613 csi2tx->pads);
617 ret = v4l2_async_register_subdev(&csi2tx->subdev);
623 csi2tx->num_lanes, csi2tx->max_lanes, csi2tx->max_streams,
624 csi2tx->has_internal_dphy ? "internal" : "no");
629 kfree(csi2tx);
635 struct csi2tx_priv *csi2tx = platform_get_drvdata(pdev);
637 v4l2_async_unregister_subdev(&csi2tx->subdev);
638 kfree(csi2tx);
648 .name = "cdns-csi2tx",