Lines Matching refs:vip
203 static inline void reg_write(struct sta2x11_vip *vip, unsigned int reg, u32 val)
205 iowrite32((val), (vip->iomem)+(reg));
208 static inline u32 reg_read(struct sta2x11_vip *vip, unsigned int reg)
210 return ioread32((vip->iomem)+(reg));
213 static void start_dma(struct sta2x11_vip *vip, struct vip_buffer *vip_buf)
217 if (vip->format.field == V4L2_FIELD_INTERLACED)
218 offset = vip->format.width * 2;
220 spin_lock_irq(&vip->slock);
222 reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) | DVP_CTL_ENA);
224 reg_write(vip, DVP_VTP, (u32)vip_buf->dma);
225 reg_write(vip, DVP_VBP, (u32)vip_buf->dma + offset);
226 spin_unlock_irq(&vip->slock);
230 static void vip_active_buf_next(struct sta2x11_vip *vip)
233 spin_lock(&vip->lock);
234 if (list_empty(&vip->buffer_list)) {/* No available buffer */
235 spin_unlock(&vip->lock);
238 vip->active = list_first_entry(&vip->buffer_list,
242 vip->tcount = 0;
243 vip->bcount = 0;
244 spin_unlock(&vip->lock);
245 if (vb2_is_streaming(&vip->vb_vidq)) { /* streaming is on */
246 start_dma(vip, vip->active); /* start dma capture */
256 struct sta2x11_vip *vip = vb2_get_drv_priv(vq);
262 sizes[0] = vip->format.sizeimage;
264 vip->sequence = 0;
265 vip->active = NULL;
266 vip->tcount = 0;
267 vip->bcount = 0;
284 struct sta2x11_vip *vip = vb2_get_drv_priv(vb->vb2_queue);
288 size = vip->format.sizeimage;
290 v4l2_err(&vip->v4l2_dev, "buffer too small (%lu < %lu)\n",
302 struct sta2x11_vip *vip = vb2_get_drv_priv(vb->vb2_queue);
305 spin_lock(&vip->lock);
306 list_add_tail(&vip_buf->list, &vip->buffer_list);
307 if (!vip->active) { /* No active buffer, active the first one */
308 vip->active = list_first_entry(&vip->buffer_list,
311 if (vb2_is_streaming(&vip->vb_vidq)) /* streaming is on */
312 start_dma(vip, vip_buf); /* start dma capture */
314 spin_unlock(&vip->lock);
319 struct sta2x11_vip *vip = vb2_get_drv_priv(vb->vb2_queue);
323 spin_lock(&vip->lock);
325 spin_unlock(&vip->lock);
328 vip_active_buf_next(vip);
333 struct sta2x11_vip *vip = vb2_get_drv_priv(vq);
335 spin_lock_irq(&vip->slock);
337 reg_write(vip, DVP_ITM, DVP_IT_VSB | DVP_IT_VST);
338 spin_unlock_irq(&vip->slock);
341 start_dma(vip, vip->active);
349 struct sta2x11_vip *vip = vb2_get_drv_priv(vq);
353 reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) & ~DVP_CTL_ENA);
355 reg_write(vip, DVP_ITM, 0);
358 spin_lock(&vip->lock);
359 list_for_each_entry_safe(vip_buf, node, &vip->buffer_list, list) {
363 spin_unlock(&vip->lock);
404 struct sta2x11_vip *vip = video_drvdata(file);
409 pci_name(vip->pdev));
429 struct sta2x11_vip *vip = video_drvdata(file);
436 v4l2_subdev_call(vip->decoder, video, querystd, &std);
441 if (vip->std != std) {
442 vip->std = std;
444 vip->format = formats_60[0];
446 vip->format = formats_50[0];
449 return v4l2_subdev_call(vip->decoder, video, s_std, std);
464 struct sta2x11_vip *vip = video_drvdata(file);
466 *std = vip->std;
482 struct sta2x11_vip *vip = video_drvdata(file);
484 return v4l2_subdev_call(vip->decoder, video, querystd, std);
514 struct sta2x11_vip *vip = video_drvdata(file);
519 ret = v4l2_subdev_call(vip->decoder, video, s_routing, i, 0, 0);
522 vip->input = i;
539 struct sta2x11_vip *vip = video_drvdata(file);
541 *i = vip->input;
586 struct sta2x11_vip *vip = video_drvdata(file);
590 v4l2_warn(&vip->v4l2_dev, "Invalid format, only UYVY supported\n");
594 if (V4L2_STD_525_60 & vip->std)
644 struct sta2x11_vip *vip = video_drvdata(file);
652 if (vb2_is_busy(&vip->vb_vidq)) {
654 v4l2_err(&vip->v4l2_dev, "device busy\n");
657 vip->format = f->fmt.pix;
658 switch (vip->format.field) {
660 t_stop = ((vip->format.height / 2 - 1) << 16) |
661 (2 * vip->format.width - 1);
663 pitch = 4 * vip->format.width;
666 t_stop = ((vip->format.height - 1) << 16) |
667 (2 * vip->format.width - 1);
668 b_stop = (0 << 16) | (2 * vip->format.width - 1);
669 pitch = 2 * vip->format.width;
672 t_stop = (0 << 16) | (2 * vip->format.width - 1);
673 b_stop = (vip->format.height << 16) |
674 (2 * vip->format.width - 1);
675 pitch = 2 * vip->format.width;
678 v4l2_err(&vip->v4l2_dev, "unknown field format\n");
682 spin_lock_irq(&vip->slock);
684 reg_write(vip, DVP_TFO, 0);
686 reg_write(vip, DVP_BFO, 0);
688 reg_write(vip, DVP_TFS, t_stop);
690 reg_write(vip, DVP_BFS, b_stop);
692 reg_write(vip, DVP_VMP, pitch);
693 spin_unlock_irq(&vip->slock);
711 struct sta2x11_vip *vip = video_drvdata(file);
713 f->fmt.pix = vip->format;
763 * @vip: local data structure containing all information
773 static irqreturn_t vip_irq(int irq, struct sta2x11_vip *vip)
777 status = reg_read(vip, DVP_ITS);
783 if (vip->overflow++ > 5)
793 if ((++vip->tcount) < 2)
796 vip->bcount++;
800 if (vip->active) { /* Acquisition is over on this buffer */
802 reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) & ~DVP_CTL_ENA);
804 vip->active->vb.vb2_buf.timestamp = ktime_get_ns();
805 vip->active->vb.sequence = vip->sequence++;
806 vb2_buffer_done(&vip->active->vb.vb2_buf, VB2_BUF_STATE_DONE);
812 static void sta2x11_vip_init_register(struct sta2x11_vip *vip)
815 spin_lock_irq(&vip->slock);
817 reg_read(vip, DVP_ITS);
819 reg_write(vip, DVP_HLFLN, DVP_HLFLN_SD);
821 reg_write(vip, DVP_CTL, DVP_CTL_RST);
823 reg_write(vip, DVP_CTL, 0);
824 spin_unlock_irq(&vip->slock);
826 static void sta2x11_vip_clear_register(struct sta2x11_vip *vip)
828 spin_lock_irq(&vip->slock);
830 reg_write(vip, DVP_ITM, 0);
832 reg_write(vip, DVP_CTL, DVP_CTL_RST);
834 reg_write(vip, DVP_CTL, 0);
836 reg_read(vip, DVP_ITS);
837 spin_unlock_irq(&vip->slock);
839 static int sta2x11_vip_init_buffer(struct sta2x11_vip *vip)
843 err = dma_set_coherent_mask(&vip->pdev->dev, DMA_BIT_MASK(29));
845 v4l2_err(&vip->v4l2_dev, "Cannot configure coherent mask");
848 memset(&vip->vb_vidq, 0, sizeof(struct vb2_queue));
849 vip->vb_vidq.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
850 vip->vb_vidq.io_modes = VB2_MMAP | VB2_READ;
851 vip->vb_vidq.drv_priv = vip;
852 vip->vb_vidq.buf_struct_size = sizeof(struct vip_buffer);
853 vip->vb_vidq.ops = &vip_video_qops;
854 vip->vb_vidq.mem_ops = &vb2_dma_contig_memops;
855 vip->vb_vidq.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
856 vip->vb_vidq.dev = &vip->pdev->dev;
857 vip->vb_vidq.lock = &vip->v4l_lock;
858 err = vb2_queue_init(&vip->vb_vidq);
861 INIT_LIST_HEAD(&vip->buffer_list);
862 spin_lock_init(&vip->lock);
866 static int sta2x11_vip_init_controls(struct sta2x11_vip *vip)
872 v4l2_ctrl_handler_init(&vip->ctrl_hdl, 0);
874 vip->v4l2_dev.ctrl_handler = &vip->ctrl_hdl;
875 if (vip->ctrl_hdl.error) {
876 int err = vip->ctrl_hdl.error;
878 v4l2_ctrl_handler_free(&vip->ctrl_hdl);
964 struct sta2x11_vip *vip;
1013 vip = kzalloc(sizeof(struct sta2x11_vip), GFP_KERNEL);
1014 if (!vip) {
1018 vip->pdev = pdev;
1019 vip->std = V4L2_STD_PAL;
1020 vip->format = formats_50[0];
1021 vip->config = config;
1022 mutex_init(&vip->v4l_lock);
1024 ret = sta2x11_vip_init_controls(vip);
1027 ret = v4l2_device_register(&pdev->dev, &vip->v4l2_dev);
1041 vip->iomem = pci_iomap(pdev, 0, 0x100);
1042 if (!vip->iomem) {
1050 ret = sta2x11_vip_init_buffer(vip);
1054 spin_lock_init(&vip->slock);
1058 IRQF_SHARED, KBUILD_MODNAME, vip);
1066 vip->video_dev = video_dev_template;
1067 vip->video_dev.v4l2_dev = &vip->v4l2_dev;
1068 vip->video_dev.queue = &vip->vb_vidq;
1069 vip->video_dev.lock = &vip->v4l_lock;
1070 video_set_drvdata(&vip->video_dev, vip);
1072 ret = video_register_device(&vip->video_dev, VFL_TYPE_VIDEO, -1);
1077 vip->adapter = i2c_get_adapter(vip->config->i2c_id);
1078 if (!vip->adapter) {
1084 vip->decoder = v4l2_i2c_new_subdev(&vip->v4l2_dev, vip->adapter,
1085 "adv7180", vip->config->i2c_addr,
1087 if (!vip->decoder) {
1093 i2c_put_adapter(vip->adapter);
1094 v4l2_subdev_call(vip->decoder, core, init, 0);
1096 sta2x11_vip_init_register(vip);
1102 video_set_drvdata(&vip->video_dev, NULL);
1104 vb2_video_unregister_device(&vip->video_dev);
1105 free_irq(pdev->irq, vip);
1109 pci_iounmap(pdev, vip->iomem);
1113 v4l2_device_unregister(&vip->v4l2_dev);
1115 kfree(vip);
1142 struct sta2x11_vip *vip =
1145 sta2x11_vip_clear_register(vip);
1147 video_set_drvdata(&vip->video_dev, NULL);
1148 vb2_video_unregister_device(&vip->video_dev);
1149 free_irq(pdev->irq, vip);
1151 pci_iounmap(pdev, vip->iomem);
1154 v4l2_device_unregister(&vip->v4l2_dev);
1156 vip_gpio_release(&pdev->dev, vip->config->pwr_pin,
1157 vip->config->pwr_name);
1158 vip_gpio_release(&pdev->dev, vip->config->reset_pin,
1159 vip->config->reset_name);
1161 kfree(vip);
1180 struct sta2x11_vip *vip =
1185 spin_lock_irqsave(&vip->slock, flags);
1186 vip->register_save_area[0] = reg_read(vip, DVP_CTL);
1187 reg_write(vip, DVP_CTL, vip->register_save_area[0] & DVP_CTL_DIS);
1188 vip->register_save_area[SAVE_COUNT] = reg_read(vip, DVP_ITM);
1189 reg_write(vip, DVP_ITM, 0);
1191 vip->register_save_area[i] = reg_read(vip, 4 * i);
1193 vip->register_save_area[SAVE_COUNT + IRQ_COUNT + i] =
1194 reg_read(vip, registers_to_save[i]);
1195 spin_unlock_irqrestore(&vip->slock, flags);
1197 vip->disabled = 1;
1214 struct sta2x11_vip *vip =
1221 vip->disabled = 0;
1223 spin_lock_irqsave(&vip->slock, flags);
1225 reg_write(vip, 4 * i, vip->register_save_area[i]);
1227 reg_write(vip, registers_to_save[i],
1228 vip->register_save_area[SAVE_COUNT + IRQ_COUNT + i]);
1229 reg_write(vip, DVP_CTL, vip->register_save_area[0]);
1230 reg_write(vip, DVP_ITM, vip->register_save_area[SAVE_COUNT]);
1231 spin_unlock_irqrestore(&vip->slock, flags);