Lines Matching defs:ov965x
248 struct ov965x {
417 return &container_of(ctrl->handler, struct ov965x, ctrls.handler)->sd;
420 static inline struct ov965x *to_ov965x(struct v4l2_subdev *sd)
422 return container_of(sd, struct ov965x, sd);
425 static int ov965x_read(struct ov965x *ov965x, u8 addr, u8 *val)
430 ret = regmap_read(ov965x->regmap, addr, &buf);
436 v4l2_dbg(2, debug, &ov965x->sd, "%s: 0x%02x @ 0x%02x. (%d)\n",
442 static int ov965x_write(struct ov965x *ov965x, u8 addr, u8 val)
446 ret = regmap_write(ov965x->regmap, addr, val);
448 v4l2_dbg(2, debug, &ov965x->sd, "%s: 0x%02x @ 0x%02X (%d)\n",
454 static int ov965x_write_array(struct ov965x *ov965x,
460 ret = ov965x_write(ov965x, regs[i].addr, regs[i].value);
465 static int ov965x_set_default_gamma_curve(struct ov965x *ov965x)
478 int ret = ov965x_write(ov965x, addr, gamma_curve[i]);
488 static int ov965x_set_color_matrix(struct ov965x *ov965x)
498 int ret = ov965x_write(ov965x, addr, mtx[i]);
508 static int __ov965x_set_power(struct ov965x *ov965x, int on)
511 int ret = clk_prepare_enable(ov965x->clk);
516 gpiod_set_value_cansleep(ov965x->gpios[GPIO_PWDN], 0);
517 gpiod_set_value_cansleep(ov965x->gpios[GPIO_RST], 0);
520 gpiod_set_value_cansleep(ov965x->gpios[GPIO_RST], 1);
521 gpiod_set_value_cansleep(ov965x->gpios[GPIO_PWDN], 1);
523 clk_disable_unprepare(ov965x->clk);
526 ov965x->streaming = 0;
533 struct ov965x *ov965x = to_ov965x(sd);
538 mutex_lock(&ov965x->lock);
539 if (ov965x->power == !on) {
540 ret = __ov965x_set_power(ov965x, on);
542 ret = ov965x_write_array(ov965x,
544 ov965x->apply_frame_fmt = 1;
545 ov965x->ctrls.update = 1;
549 ov965x->power += on ? 1 : -1;
551 WARN_ON(ov965x->power < 0);
552 mutex_unlock(&ov965x->lock);
560 static void ov965x_update_exposure_ctrl(struct ov965x *ov965x)
562 struct v4l2_ctrl *ctrl = ov965x->ctrls.exposure;
567 mutex_lock(&ov965x->lock);
568 if (WARN_ON(!ctrl || !ov965x->frame_size)) {
569 mutex_unlock(&ov965x->lock);
572 clkrc = DEF_CLKRC + ov965x->fiv->clkrc_div;
574 fint = ov965x->mclk_frequency * ((clkrc >> 7) + 1) /
578 max = ov965x->frame_size->max_exp_lines * trow;
579 ov965x->exp_row_interval = trow;
580 mutex_unlock(&ov965x->lock);
582 v4l2_dbg(1, debug, &ov965x->sd, "clkrc: %#x, fi: %lu, tr: %lu, %d\n",
591 v4l2_err(&ov965x->sd, "Exposure ctrl range update failed\n");
594 static int ov965x_set_banding_filter(struct ov965x *ov965x, int value)
600 ret = ov965x_read(ov965x, REG_COM8, ®);
606 ret = ov965x_write(ov965x, REG_COM8, reg);
610 if (WARN_ON(!ov965x->fiv))
617 mbd = (1000UL * ov965x->fiv->interval.denominator *
618 ov965x->frame_size->max_exp_lines) /
619 ov965x->fiv->interval.numerator;
622 return ov965x_write(ov965x, REG_MBD, mbd);
625 static int ov965x_set_white_balance(struct ov965x *ov965x, int awb)
630 ret = ov965x_read(ov965x, REG_COM8, ®);
633 ret = ov965x_write(ov965x, REG_COM8, reg);
636 ret = ov965x_write(ov965x, REG_BLUE,
637 ov965x->ctrls.blue_balance->val);
640 ret = ov965x_write(ov965x, REG_RED,
641 ov965x->ctrls.red_balance->val);
649 static int ov965x_set_brightness(struct ov965x *ov965x, int val)
668 ret = ov965x_write(ov965x, regs[0][i],
673 static int ov965x_set_gain(struct ov965x *ov965x, int auto_gain)
675 struct ov965x_ctrls *ctrls = &ov965x->ctrls;
683 ret = ov965x_read(ov965x, REG_COM8, ®);
690 ret = ov965x_write(ov965x, REG_COM8, reg);
714 ret = ov965x_write(ov965x, REG_GAIN, rgain & 0xff);
717 ret = ov965x_read(ov965x, REG_VREF, ®);
722 ret = ov965x_write(ov965x, REG_VREF, reg);
732 static int ov965x_set_sharpness(struct ov965x *ov965x, unsigned int value)
737 ret = ov965x_read(ov965x, REG_COM14, &com14);
740 ret = ov965x_read(ov965x, REG_EDGE, &edge);
751 ret = ov965x_write(ov965x, REG_COM14, com14);
758 return ov965x_write(ov965x, REG_EDGE, edge);
761 static int ov965x_set_exposure(struct ov965x *ov965x, int exp)
763 struct ov965x_ctrls *ctrls = &ov965x->ctrls;
769 ret = ov965x_read(ov965x, REG_COM8, ®);
776 ret = ov965x_write(ov965x, REG_COM8, reg);
783 / ov965x->exp_row_interval;
788 ret = ov965x_write(ov965x, REG_COM1, exposure & 0x3);
790 ret = ov965x_write(ov965x, REG_AECH,
793 ret = ov965x_write(ov965x, REG_AECHM,
796 ctrls->exposure->val = ((exposure * ov965x->exp_row_interval)
802 v4l2_ctrl_activate(ov965x->ctrls.brightness, !exp);
806 static int ov965x_set_flip(struct ov965x *ov965x)
810 if (ov965x->ctrls.hflip->val)
813 if (ov965x->ctrls.vflip->val)
816 return ov965x_write(ov965x, REG_MVFP, mvfp);
822 static int ov965x_set_saturation(struct ov965x *ov965x, int val)
840 ret = ov965x_write(ov965x, addr + i, regs[val][i]);
845 static int ov965x_set_test_pattern(struct ov965x *ov965x, int value)
850 ret = ov965x_read(ov965x, REG_COM23, ®);
854 return ov965x_write(ov965x, REG_COM23, reg);
857 static int __g_volatile_ctrl(struct ov965x *ov965x, struct v4l2_ctrl *ctrl)
863 if (!ov965x->power)
870 ret = ov965x_read(ov965x, REG_GAIN, ®0);
873 ret = ov965x_read(ov965x, REG_VREF, ®1);
878 ov965x->ctrls.gain->val = m * (16 + (gain & 0xf));
884 ret = ov965x_read(ov965x, REG_COM1, ®0);
887 ret = ov965x_read(ov965x, REG_AECH, ®1);
890 ret = ov965x_read(ov965x, REG_AECHM, ®2);
895 ov965x->ctrls.exposure->val = ((exposure *
896 ov965x->exp_row_interval) + 50) / 100;
906 struct ov965x *ov965x = to_ov965x(sd);
911 mutex_lock(&ov965x->lock);
912 ret = __g_volatile_ctrl(ov965x, ctrl);
913 mutex_unlock(&ov965x->lock);
920 struct ov965x *ov965x = to_ov965x(sd);
924 ctrl->name, ctrl->val, ov965x->power);
926 mutex_lock(&ov965x->lock);
931 if (ov965x->power == 0) {
932 mutex_unlock(&ov965x->lock);
938 ret = ov965x_set_white_balance(ov965x, ctrl->val);
942 ret = ov965x_set_brightness(ov965x, ctrl->val);
946 ret = ov965x_set_exposure(ov965x, ctrl->val);
950 ret = ov965x_set_gain(ov965x, ctrl->val);
954 ret = ov965x_set_flip(ov965x);
958 ret = ov965x_set_banding_filter(ov965x, ctrl->val);
962 ret = ov965x_set_saturation(ov965x, ctrl->val);
966 ret = ov965x_set_sharpness(ov965x, ctrl->val);
970 ret = ov965x_set_test_pattern(ov965x, ctrl->val);
974 mutex_unlock(&ov965x->lock);
988 static int ov965x_initialize_controls(struct ov965x *ov965x)
991 struct ov965x_ctrls *ctrls = &ov965x->ctrls;
1056 ov965x->sd.ctrl_handler = hdl;
1109 struct ov965x *ov965x = to_ov965x(sd);
1111 mutex_lock(&ov965x->lock);
1112 fi->interval = ov965x->fiv->interval;
1113 mutex_unlock(&ov965x->lock);
1118 static int __ov965x_set_frame_interval(struct ov965x *ov965x,
1121 struct v4l2_mbus_framefmt *mbus_fmt = &ov965x->format;
1145 ov965x->fiv = fiv;
1147 v4l2_dbg(1, debug, &ov965x->sd, "Changed frame interval to %u us\n",
1156 struct ov965x *ov965x = to_ov965x(sd);
1162 mutex_lock(&ov965x->lock);
1163 ret = __ov965x_set_frame_interval(ov965x, fi);
1164 ov965x->apply_frame_fmt = 1;
1165 mutex_unlock(&ov965x->lock);
1173 struct ov965x *ov965x = to_ov965x(sd);
1182 mutex_lock(&ov965x->lock);
1183 fmt->format = ov965x->format;
1184 mutex_unlock(&ov965x->lock);
1220 struct ov965x *ov965x = to_ov965x(sd);
1234 mutex_lock(&ov965x->lock);
1242 if (ov965x->streaming) {
1245 ov965x->frame_size = size;
1246 ov965x->format = fmt->format;
1247 ov965x->tslb_reg = ov965x_formats[index].tslb_reg;
1248 ov965x->apply_frame_fmt = 1;
1257 __ov965x_set_frame_interval(ov965x, &fiv);
1259 mutex_unlock(&ov965x->lock);
1262 ov965x_update_exposure_ctrl(ov965x);
1267 static int ov965x_set_frame_size(struct ov965x *ov965x)
1272 ret = ov965x_write(ov965x, frame_size_reg_addr[i],
1273 ov965x->frame_size->regs[i]);
1277 static int __ov965x_set_params(struct ov965x *ov965x)
1279 struct ov965x_ctrls *ctrls = &ov965x->ctrls;
1283 if (ov965x->apply_frame_fmt) {
1284 reg = DEF_CLKRC + ov965x->fiv->clkrc_div;
1285 ret = ov965x_write(ov965x, REG_CLKRC, reg);
1288 ret = ov965x_set_frame_size(ov965x);
1291 ret = ov965x_read(ov965x, REG_TSLB, ®);
1295 reg |= ov965x->tslb_reg;
1296 ret = ov965x_write(ov965x, REG_TSLB, reg);
1300 ret = ov965x_set_default_gamma_curve(ov965x);
1303 ret = ov965x_set_color_matrix(ov965x);
1310 ret = ov965x_read(ov965x, REG_COM11, ®);
1313 ret = ov965x_write(ov965x, REG_COM11, reg);
1320 return ov965x_set_banding_filter(ov965x, ctrls->light_freq->val);
1325 struct ov965x *ov965x = to_ov965x(sd);
1326 struct ov965x_ctrls *ctrls = &ov965x->ctrls;
1331 mutex_lock(&ov965x->lock);
1332 if (ov965x->streaming == !on) {
1334 ret = __ov965x_set_params(ov965x);
1341 mutex_unlock(&ov965x->lock);
1344 mutex_lock(&ov965x->lock);
1349 ret = ov965x_write(ov965x, REG_COM2,
1353 ov965x->streaming += on ? 1 : -1;
1355 WARN_ON(ov965x->streaming < 0);
1356 mutex_unlock(&ov965x->lock);
1407 static int ov965x_configure_gpios_pdata(struct ov965x *ov965x,
1412 struct device *dev = regmap_get_device(ov965x->regmap);
1417 for (i = 0; i < ARRAY_SIZE(ov965x->gpios); i++) {
1426 v4l2_dbg(1, debug, &ov965x->sd, "set gpio %d to 1\n", gpio);
1430 ov965x->gpios[i] = gpio_to_desc(gpio);
1436 static int ov965x_configure_gpios(struct ov965x *ov965x)
1438 struct device *dev = regmap_get_device(ov965x->regmap);
1440 ov965x->gpios[GPIO_PWDN] = devm_gpiod_get_optional(dev, "powerdown",
1442 if (IS_ERR(ov965x->gpios[GPIO_PWDN])) {
1444 return PTR_ERR(ov965x->gpios[GPIO_PWDN]);
1447 ov965x->gpios[GPIO_RST] = devm_gpiod_get_optional(dev, "reset",
1449 if (IS_ERR(ov965x->gpios[GPIO_RST])) {
1451 return PTR_ERR(ov965x->gpios[GPIO_RST]);
1459 struct ov965x *ov965x = to_ov965x(sd);
1463 mutex_lock(&ov965x->lock);
1464 ret = __ov965x_set_power(ov965x, 1);
1471 ret = ov965x_read(ov965x, REG_PID, &pid);
1473 ret = ov965x_read(ov965x, REG_VER, &ver);
1475 __ov965x_set_power(ov965x, 0);
1478 ov965x->id = OV965X_ID(pid, ver);
1479 if (ov965x->id == OV9650_ID || ov965x->id == OV9652_ID) {
1480 v4l2_info(sd, "Found OV%04X sensor\n", ov965x->id);
1483 ov965x->id, ret);
1488 mutex_unlock(&ov965x->lock);
1497 struct ov965x *ov965x;
1505 ov965x = devm_kzalloc(&client->dev, sizeof(*ov965x), GFP_KERNEL);
1506 if (!ov965x)
1509 ov965x->regmap = devm_regmap_init_sccb(client, &ov965x_regmap_config);
1510 if (IS_ERR(ov965x->regmap)) {
1512 return PTR_ERR(ov965x->regmap);
1520 ov965x->mclk_frequency = pdata->mclk_frequency;
1522 ret = ov965x_configure_gpios_pdata(ov965x, pdata);
1526 ov965x->clk = devm_clk_get(&client->dev, NULL);
1527 if (IS_ERR(ov965x->clk))
1528 return PTR_ERR(ov965x->clk);
1529 ov965x->mclk_frequency = clk_get_rate(ov965x->clk);
1531 ret = ov965x_configure_gpios(ov965x);
1541 mutex_init(&ov965x->lock);
1543 sd = &ov965x->sd;
1551 ov965x->pad.flags = MEDIA_PAD_FL_SOURCE;
1553 ret = media_entity_pads_init(&sd->entity, 1, &ov965x->pad);
1557 ret = ov965x_initialize_controls(ov965x);
1561 ov965x_get_default_format(&ov965x->format);
1562 ov965x->frame_size = &ov965x_framesizes[0];
1563 ov965x->fiv = &ov965x_intervals[0];
1570 ov965x_update_exposure_ctrl(ov965x);
1582 mutex_destroy(&ov965x->lock);
1589 struct ov965x *ov965x = to_ov965x(sd);
1594 mutex_destroy(&ov965x->lock);