Lines Matching defs:clkrc
251 u8 clkrc; /* Clock divider value */
796 u32 clkrc = info->clkrc;
804 clkrc++;
806 clkrc = (clkrc >> 1);
810 (4 * clkrc);
818 ret = ov7670_write(sd, REG_CLKRC, info->clkrc);
830 u32 clkrc;
837 * pixclk = clock_speed / (clkrc + 1) * PLLfactor
841 clkrc = 0;
844 clkrc = (5 * pll_factor * info->clock_speed * tpf->numerator) /
847 clkrc = (clkrc << 1);
848 clkrc--;
852 * The datasheet claims that clkrc = 0 will divide the input clock by 1
854 * So, if clkrc = 0 just bypass the divider.
856 if (clkrc <= 0)
857 clkrc = CLK_EXT;
858 else if (clkrc > CLK_SCALE)
859 clkrc = CLK_SCALE;
860 info->clkrc = clkrc;
883 if ((info->clkrc & CLK_EXT) == 0 && (info->clkrc & CLK_SCALE) > 1)
884 tpf->denominator /= (info->clkrc & CLK_SCALE);
901 info->clkrc = (info->clkrc & 0x80) | div;
911 return ov7670_write(sd, REG_CLKRC, info->clkrc);
1074 * If we're running RGB565, we must rewrite clkrc after setting
1076 * doing RGB565, we must not rewrite clkrc or the image looks
1079 * (Update) Now that we retain clkrc state, we should be able
1083 ret = ov7670_write(sd, REG_CLKRC, info->clkrc);
1921 info->clkrc = 0;