Lines Matching defs:mt9v032
26 #include <media/i2c/mt9v032.h>
184 struct mt9v032 {
220 static struct mt9v032 *to_mt9v032(struct v4l2_subdev *sd)
222 return container_of(sd, struct mt9v032, subdev);
226 mt9v032_update_aec_agc(struct mt9v032 *mt9v032, u16 which, int enable)
228 struct regmap *map = mt9v032->regmap;
229 u16 value = mt9v032->aec_agc;
241 mt9v032->aec_agc = value;
246 mt9v032_update_hblank(struct mt9v032 *mt9v032)
248 struct v4l2_rect *crop = &mt9v032->crop;
249 unsigned int min_hblank = mt9v032->model->data->min_hblank;
252 if (mt9v032->version->version == MT9V034_CHIP_ID_REV1)
253 min_hblank += (mt9v032->hratio - 1) * 10;
254 min_hblank = max_t(int, mt9v032->model->data->min_row_time - crop->width,
256 hblank = max_t(unsigned int, mt9v032->hblank, min_hblank);
258 return regmap_write(mt9v032->regmap, MT9V032_HORIZONTAL_BLANKING,
262 static int mt9v032_power_on(struct mt9v032 *mt9v032)
264 struct regmap *map = mt9v032->regmap;
267 gpiod_set_value_cansleep(mt9v032->reset_gpio, 1);
269 ret = clk_set_rate(mt9v032->clk, mt9v032->sysclk);
274 ret = clk_prepare_enable(mt9v032->clk);
280 if (mt9v032->reset_gpio) {
281 gpiod_set_value_cansleep(mt9v032->reset_gpio, 0);
308 clk_disable_unprepare(mt9v032->clk);
312 static void mt9v032_power_off(struct mt9v032 *mt9v032)
314 clk_disable_unprepare(mt9v032->clk);
317 static int __mt9v032_set_power(struct mt9v032 *mt9v032, bool on)
319 struct regmap *map = mt9v032->regmap;
323 mt9v032_power_off(mt9v032);
327 ret = mt9v032_power_on(mt9v032);
332 if (mt9v032->pdata && mt9v032->pdata->clk_pol) {
333 ret = regmap_write(map, mt9v032->model->data->pclk_reg,
344 return v4l2_ctrl_handler_setup(&mt9v032->ctrls);
352 __mt9v032_get_pad_format(struct mt9v032 *mt9v032, struct v4l2_subdev_pad_config *cfg,
357 return v4l2_subdev_get_try_format(&mt9v032->subdev, cfg, pad);
359 return &mt9v032->format;
366 __mt9v032_get_pad_crop(struct mt9v032 *mt9v032, struct v4l2_subdev_pad_config *cfg,
371 return v4l2_subdev_get_try_crop(&mt9v032->subdev, cfg, pad);
373 return &mt9v032->crop;
383 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
384 struct v4l2_rect *crop = &mt9v032->crop;
385 struct regmap *map = mt9v032->regmap;
394 hbin = fls(mt9v032->hratio) - 1;
395 vbin = fls(mt9v032->vratio) - 1;
419 ret = mt9v032_update_hblank(mt9v032);
431 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
436 code->code = mt9v032->format.code;
444 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
448 if (mt9v032->format.code != fse->code)
463 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
465 format->format = *__mt9v032_get_pad_format(mt9v032, cfg, format->pad,
470 static void mt9v032_configure_pixel_rate(struct mt9v032 *mt9v032)
472 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
475 ret = v4l2_ctrl_s_ctrl_int64(mt9v032->pixel_rate,
476 mt9v032->sysclk / mt9v032->hratio);
498 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
506 __crop = __mt9v032_get_pad_crop(mt9v032, cfg, format->pad,
522 __format = __mt9v032_get_pad_format(mt9v032, cfg, format->pad,
528 mt9v032->hratio = hratio;
529 mt9v032->vratio = vratio;
530 mt9v032_configure_pixel_rate(mt9v032);
542 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
547 sel->r = *__mt9v032_get_pad_crop(mt9v032, cfg, sel->pad, sel->which);
555 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
584 __crop = __mt9v032_get_pad_crop(mt9v032, cfg, sel->pad, sel->which);
590 __format = __mt9v032_get_pad_format(mt9v032, cfg, sel->pad,
595 mt9v032->hratio = 1;
596 mt9v032->vratio = 1;
597 mt9v032_configure_pixel_rate(mt9v032);
643 struct mt9v032 *mt9v032 =
644 container_of(ctrl->handler, struct mt9v032, ctrls);
645 struct regmap *map = mt9v032->regmap;
651 return mt9v032_update_aec_agc(mt9v032, MT9V032_AGC_ENABLE,
658 return mt9v032_update_aec_agc(mt9v032, MT9V032_AEC_ENABLE,
666 mt9v032->hblank = ctrl->val;
667 return mt9v032_update_hblank(mt9v032);
675 if (mt9v032->link_freq == NULL)
678 freq = mt9v032->pdata->link_freqs[mt9v032->link_freq->val];
679 *mt9v032->pixel_rate->p_new.p_s64 = freq;
680 mt9v032->sysclk = freq;
684 switch (mt9v032->test_pattern->val) {
701 data = (mt9v032->test_pattern_color->val <<
729 mt9v032->model->data->aec_max_shutter_reg,
844 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
847 mutex_lock(&mt9v032->power_lock);
852 if (mt9v032->power_count == !on) {
853 ret = __mt9v032_set_power(mt9v032, !!on);
859 mt9v032->power_count += on ? 1 : -1;
860 WARN_ON(mt9v032->power_count < 0);
863 mutex_unlock(&mt9v032->power_lock);
874 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
882 ret = mt9v032_power_on(mt9v032);
889 ret = regmap_read(mt9v032->regmap, MT9V032_CHIP_VERSION, &version);
891 mt9v032_power_off(mt9v032);
900 mt9v032->version = &mt9v032_versions[i];
905 if (mt9v032->version == NULL) {
912 mt9v032->version->name, client->addr);
914 mt9v032_configure_pixel_rate(mt9v032);
921 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
933 if (mt9v032->model->color)
1043 struct mt9v032 *mt9v032;
1047 mt9v032 = devm_kzalloc(&client->dev, sizeof(*mt9v032), GFP_KERNEL);
1048 if (!mt9v032)
1051 mt9v032->regmap = devm_regmap_init_i2c(client, &mt9v032_regmap_config);
1052 if (IS_ERR(mt9v032->regmap))
1053 return PTR_ERR(mt9v032->regmap);
1055 mt9v032->clk = devm_clk_get(&client->dev, NULL);
1056 if (IS_ERR(mt9v032->clk))
1057 return PTR_ERR(mt9v032->clk);
1059 mt9v032->reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
1061 if (IS_ERR(mt9v032->reset_gpio))
1062 return PTR_ERR(mt9v032->reset_gpio);
1064 mt9v032->standby_gpio = devm_gpiod_get_optional(&client->dev, "standby",
1066 if (IS_ERR(mt9v032->standby_gpio))
1067 return PTR_ERR(mt9v032->standby_gpio);
1069 mutex_init(&mt9v032->power_lock);
1070 mt9v032->pdata = pdata;
1071 mt9v032->model = (const void *)did->driver_data;
1073 v4l2_ctrl_handler_init(&mt9v032->ctrls, 11 +
1076 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
1078 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
1081 v4l2_ctrl_new_std_menu(&mt9v032->ctrls, &mt9v032_ctrl_ops,
1084 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
1085 V4L2_CID_EXPOSURE, mt9v032->model->data->min_shutter,
1086 mt9v032->model->data->max_shutter, 1,
1088 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
1089 V4L2_CID_HBLANK, mt9v032->model->data->min_hblank,
1092 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
1093 V4L2_CID_VBLANK, mt9v032->model->data->min_vblank,
1094 mt9v032->model->data->max_vblank, 1,
1096 mt9v032->test_pattern = v4l2_ctrl_new_std_menu_items(&mt9v032->ctrls,
1100 mt9v032->test_pattern_color = v4l2_ctrl_new_custom(&mt9v032->ctrls,
1103 v4l2_ctrl_new_custom(&mt9v032->ctrls,
1104 mt9v032->model->data->aec_max_shutter_v4l2_ctrl,
1107 v4l2_ctrl_new_custom(&mt9v032->ctrls, &mt9v032_aegc_controls[i],
1110 v4l2_ctrl_cluster(2, &mt9v032->test_pattern);
1112 mt9v032->pixel_rate =
1113 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
1124 mt9v032->link_freq =
1125 v4l2_ctrl_new_int_menu(&mt9v032->ctrls,
1129 v4l2_ctrl_cluster(2, &mt9v032->link_freq);
1133 mt9v032->subdev.ctrl_handler = &mt9v032->ctrls;
1135 if (mt9v032->ctrls.error) {
1137 mt9v032->ctrls.error);
1138 ret = mt9v032->ctrls.error;
1142 mt9v032->crop.left = MT9V032_COLUMN_START_DEF;
1143 mt9v032->crop.top = MT9V032_ROW_START_DEF;
1144 mt9v032->crop.width = MT9V032_WINDOW_WIDTH_DEF;
1145 mt9v032->crop.height = MT9V032_WINDOW_HEIGHT_DEF;
1147 if (mt9v032->model->color)
1148 mt9v032->format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
1150 mt9v032->format.code = MEDIA_BUS_FMT_Y10_1X10;
1152 mt9v032->format.width = MT9V032_WINDOW_WIDTH_DEF;
1153 mt9v032->format.height = MT9V032_WINDOW_HEIGHT_DEF;
1154 mt9v032->format.field = V4L2_FIELD_NONE;
1155 mt9v032->format.colorspace = V4L2_COLORSPACE_SRGB;
1157 mt9v032->hratio = 1;
1158 mt9v032->vratio = 1;
1160 mt9v032->aec_agc = MT9V032_AEC_ENABLE | MT9V032_AGC_ENABLE;
1161 mt9v032->hblank = MT9V032_HORIZONTAL_BLANKING_DEF;
1162 mt9v032->sysclk = MT9V032_SYSCLK_FREQ_DEF;
1164 v4l2_i2c_subdev_init(&mt9v032->subdev, client, &mt9v032_subdev_ops);
1165 mt9v032->subdev.internal_ops = &mt9v032_subdev_internal_ops;
1166 mt9v032->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1168 mt9v032->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1169 mt9v032->pad.flags = MEDIA_PAD_FL_SOURCE;
1170 ret = media_entity_pads_init(&mt9v032->subdev.entity, 1, &mt9v032->pad);
1174 mt9v032->subdev.dev = &client->dev;
1175 ret = v4l2_async_register_subdev(&mt9v032->subdev);
1182 media_entity_cleanup(&mt9v032->subdev.entity);
1183 v4l2_ctrl_handler_free(&mt9v032->ctrls);
1190 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
1193 v4l2_ctrl_handler_free(&mt9v032->ctrls);
1265 { "mt9v032", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V032_COLOR] },
1279 { .compatible = "aptina,mt9v032" },
1290 .name = "mt9v032",