Lines Matching defs:cec_clk
1754 u32 cec_clk = state->pdata.cec_clk;
1777 v4l2_dbg(1, debug, sd, "%s: cec_clk %d\n", __func__, cec_clk);
1787 if (cec_clk % 750000 != 0)
1788 v4l2_err(sd, "%s: cec_clk %d, not multiple of 750 Khz\n",
1789 __func__, cec_clk);
1791 ratio = (cec_clk / 750000) - 1;
1884 if (state->pdata.cec_clk < 3000000 ||
1885 state->pdata.cec_clk > 100000000) {
1886 v4l2_err(sd, "%s: cec_clk %u outside range, disabling cec\n",
1887 __func__, state->pdata.cec_clk);
1888 state->pdata.cec_clk = 0;
1891 if (state->pdata.cec_clk) {