Lines Matching defs:adv7511_rd
188 static int adv7511_rd(struct v4l2_subdev *sd, u8 reg)
214 adv7511_wr(sd, reg, (adv7511_rd(sd, reg) & clr_mask) | val_mask);
308 return adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT;
313 return adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT;
466 reg->val = adv7511_rd(sd, reg->reg & 0xff);
534 if (!(adv7511_rd(sd, cri->present_reg) & cri->present_mask)) {
553 buffer[i + 4] = adv7511_rd(sd, cri->payload_addr + i);
609 (adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT) ? "detected" : "no",
610 (adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT) ? "detected" : "no",
614 (adv7511_rd(sd, 0xaf) & 0x02) ?
616 (adv7511_rd(sd, 0xa1) & 0x3c) ?
619 states[adv7511_rd(sd, 0xc8) & 0xf],
620 errors[adv7511_rd(sd, 0xc8) >> 4], state->edid_detect_counter,
621 adv7511_rd(sd, 0x94), adv7511_rd(sd, 0x96));
622 v4l2_info(sd, "RGB quantization: %s range\n", adv7511_rd(sd, 0x18) & 0x80 ? "limited" : "full");
623 if (adv7511_rd(sd, 0xaf) & 0x02) {
625 u8 manual_cts = adv7511_rd(sd, 0x0a) & 0x80;
626 u32 N = (adv7511_rd(sd, 0x01) & 0xf) << 16 |
627 adv7511_rd(sd, 0x02) << 8 |
628 adv7511_rd(sd, 0x03);
629 u8 vic_detect = adv7511_rd(sd, 0x3e) >> 2;
630 u8 vic_sent = adv7511_rd(sd, 0x3d) & 0x3f;
634 CTS = (adv7511_rd(sd, 0x07) & 0xf) << 16 |
635 adv7511_rd(sd, 0x08) << 8 |
636 adv7511_rd(sd, 0x09);
638 CTS = (adv7511_rd(sd, 0x04) & 0xf) << 16 |
639 adv7511_rd(sd, 0x05) << 8 |
640 adv7511_rd(sd, 0x06);
696 if ((adv7511_rd(sd, 0x41) & 0x40) == 0)
935 irqs_rd = adv7511_rd(sd, 0x94);
953 irq_status = adv7511_rd(sd, 0x96);
954 cec_irq = adv7511_rd(sd, 0x97);
1481 ed.segment = adv7511_rd(sd, 0xc4);
1577 u8 status = adv7511_rd(sd, 0x42);
1660 u8 edidRdy = adv7511_rd(sd, 0xc5);
1669 int segment = adv7511_rd(sd, 0xc4);
1865 state->chip_revision = adv7511_rd(sd, 0x0);
1866 chip_id[0] = adv7511_rd(sd, 0xf5);
1867 chip_id[1] = adv7511_rd(sd, 0xf6);