Lines Matching refs:sd
25 struct v4l2_subdev sd;
63 static inline struct adv7183 *to_adv7183(struct v4l2_subdev *sd)
65 return container_of(sd, struct adv7183, sd);
69 return &container_of(ctrl->handler, struct adv7183, hdl)->sd;
72 static inline int adv7183_read(struct v4l2_subdev *sd, unsigned char reg)
74 struct i2c_client *client = v4l2_get_subdevdata(sd);
79 static inline int adv7183_write(struct v4l2_subdev *sd, unsigned char reg,
82 struct i2c_client *client = v4l2_get_subdevdata(sd);
87 static int adv7183_writeregs(struct v4l2_subdev *sd,
94 v4l2_err(sd, "invalid regs array\n");
103 adv7183_write(sd, reg, data);
108 static int adv7183_log_status(struct v4l2_subdev *sd)
110 struct adv7183 *decoder = to_adv7183(sd);
112 v4l2_info(sd, "adv7183: Input control = 0x%02x\n",
113 adv7183_read(sd, ADV7183_IN_CTRL));
114 v4l2_info(sd, "adv7183: Video selection = 0x%02x\n",
115 adv7183_read(sd, ADV7183_VD_SEL));
116 v4l2_info(sd, "adv7183: Output control = 0x%02x\n",
117 adv7183_read(sd, ADV7183_OUT_CTRL));
118 v4l2_info(sd, "adv7183: Extended output control = 0x%02x\n",
119 adv7183_read(sd, ADV7183_EXT_OUT_CTRL));
120 v4l2_info(sd, "adv7183: Autodetect enable = 0x%02x\n",
121 adv7183_read(sd, ADV7183_AUTO_DET_EN));
122 v4l2_info(sd, "adv7183: Contrast = 0x%02x\n",
123 adv7183_read(sd, ADV7183_CONTRAST));
124 v4l2_info(sd, "adv7183: Brightness = 0x%02x\n",
125 adv7183_read(sd, ADV7183_BRIGHTNESS));
126 v4l2_info(sd, "adv7183: Hue = 0x%02x\n",
127 adv7183_read(sd, ADV7183_HUE));
128 v4l2_info(sd, "adv7183: Default value Y = 0x%02x\n",
129 adv7183_read(sd, ADV7183_DEF_Y));
130 v4l2_info(sd, "adv7183: Default value C = 0x%02x\n",
131 adv7183_read(sd, ADV7183_DEF_C));
132 v4l2_info(sd, "adv7183: ADI control = 0x%02x\n",
133 adv7183_read(sd, ADV7183_ADI_CTRL));
134 v4l2_info(sd, "adv7183: Power Management = 0x%02x\n",
135 adv7183_read(sd, ADV7183_POW_MANAGE));
136 v4l2_info(sd, "adv7183: Status 1 2 and 3 = 0x%02x 0x%02x 0x%02x\n",
137 adv7183_read(sd, ADV7183_STATUS_1),
138 adv7183_read(sd, ADV7183_STATUS_2),
139 adv7183_read(sd, ADV7183_STATUS_3));
140 v4l2_info(sd, "adv7183: Ident = 0x%02x\n",
141 adv7183_read(sd, ADV7183_IDENT));
142 v4l2_info(sd, "adv7183: Analog clamp control = 0x%02x\n",
143 adv7183_read(sd, ADV7183_ANAL_CLAMP_CTRL));
144 v4l2_info(sd, "adv7183: Digital clamp control 1 = 0x%02x\n",
145 adv7183_read(sd, ADV7183_DIGI_CLAMP_CTRL_1));
146 v4l2_info(sd, "adv7183: Shaping filter control 1 and 2 = 0x%02x 0x%02x\n",
147 adv7183_read(sd, ADV7183_SHAP_FILT_CTRL),
148 adv7183_read(sd, ADV7183_SHAP_FILT_CTRL_2));
149 v4l2_info(sd, "adv7183: Comb filter control = 0x%02x\n",
150 adv7183_read(sd, ADV7183_COMB_FILT_CTRL));
151 v4l2_info(sd, "adv7183: ADI control 2 = 0x%02x\n",
152 adv7183_read(sd, ADV7183_ADI_CTRL_2));
153 v4l2_info(sd, "adv7183: Pixel delay control = 0x%02x\n",
154 adv7183_read(sd, ADV7183_PIX_DELAY_CTRL));
155 v4l2_info(sd, "adv7183: Misc gain control = 0x%02x\n",
156 adv7183_read(sd, ADV7183_MISC_GAIN_CTRL));
157 v4l2_info(sd, "adv7183: AGC mode control = 0x%02x\n",
158 adv7183_read(sd, ADV7183_AGC_MODE_CTRL));
159 v4l2_info(sd, "adv7183: Chroma gain control 1 and 2 = 0x%02x 0x%02x\n",
160 adv7183_read(sd, ADV7183_CHRO_GAIN_CTRL_1),
161 adv7183_read(sd, ADV7183_CHRO_GAIN_CTRL_2));
162 v4l2_info(sd, "adv7183: Luma gain control 1 and 2 = 0x%02x 0x%02x\n",
163 adv7183_read(sd, ADV7183_LUMA_GAIN_CTRL_1),
164 adv7183_read(sd, ADV7183_LUMA_GAIN_CTRL_2));
165 v4l2_info(sd, "adv7183: Vsync field control 1 2 and 3 = 0x%02x 0x%02x 0x%02x\n",
166 adv7183_read(sd, ADV7183_VS_FIELD_CTRL_1),
167 adv7183_read(sd, ADV7183_VS_FIELD_CTRL_2),
168 adv7183_read(sd, ADV7183_VS_FIELD_CTRL_3));
169 v4l2_info(sd, "adv7183: Hsync position control 1 2 and 3 = 0x%02x 0x%02x 0x%02x\n",
170 adv7183_read(sd, ADV7183_HS_POS_CTRL_1),
171 adv7183_read(sd, ADV7183_HS_POS_CTRL_2),
172 adv7183_read(sd, ADV7183_HS_POS_CTRL_3));
173 v4l2_info(sd, "adv7183: Polarity = 0x%02x\n",
174 adv7183_read(sd, ADV7183_POLARITY));
175 v4l2_info(sd, "adv7183: ADC control = 0x%02x\n",
176 adv7183_read(sd, ADV7183_ADC_CTRL));
177 v4l2_info(sd, "adv7183: SD offset Cb and Cr = 0x%02x 0x%02x\n",
178 adv7183_read(sd, ADV7183_SD_OFFSET_CB),
179 adv7183_read(sd, ADV7183_SD_OFFSET_CR));
180 v4l2_info(sd, "adv7183: SD saturation Cb and Cr = 0x%02x 0x%02x\n",
181 adv7183_read(sd, ADV7183_SD_SATURATION_CB),
182 adv7183_read(sd, ADV7183_SD_SATURATION_CR));
183 v4l2_info(sd, "adv7183: Drive strength = 0x%02x\n",
184 adv7183_read(sd, ADV7183_DRIVE_STR));
185 v4l2_ctrl_handler_log_status(&decoder->hdl, sd->name);
189 static int adv7183_g_std(struct v4l2_subdev *sd, v4l2_std_id *std)
191 struct adv7183 *decoder = to_adv7183(sd);
197 static int adv7183_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
199 struct adv7183 *decoder = to_adv7183(sd);
202 reg = adv7183_read(sd, ADV7183_IN_CTRL) & 0xF;
221 adv7183_write(sd, ADV7183_IN_CTRL, reg);
228 static int adv7183_reset(struct v4l2_subdev *sd, u32 val)
232 reg = adv7183_read(sd, ADV7183_POW_MANAGE) | 0x80;
233 adv7183_write(sd, ADV7183_POW_MANAGE, reg);
239 static int adv7183_s_routing(struct v4l2_subdev *sd,
242 struct adv7183 *decoder = to_adv7183(sd);
250 reg = adv7183_read(sd, ADV7183_IN_CTRL) & 0xF0;
300 adv7183_write(sd, ADV7183_IN_CTRL, reg);
305 reg = adv7183_read(sd, ADV7183_OUT_CTRL) & 0xC0;
314 adv7183_write(sd, ADV7183_OUT_CTRL, reg);
322 struct v4l2_subdev *sd = to_sd(ctrl);
329 adv7183_write(sd, ADV7183_BRIGHTNESS, val);
332 adv7183_write(sd, ADV7183_CONTRAST, val);
335 adv7183_write(sd, ADV7183_SD_SATURATION_CB, val >> 8);
336 adv7183_write(sd, ADV7183_SD_SATURATION_CR, (val & 0xFF));
339 adv7183_write(sd, ADV7183_SD_OFFSET_CB, val >> 8);
340 adv7183_write(sd, ADV7183_SD_OFFSET_CR, (val & 0xFF));
349 static int adv7183_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
351 struct adv7183 *decoder = to_adv7183(sd);
355 reg = adv7183_read(sd, ADV7183_IN_CTRL) & 0xF;
356 adv7183_write(sd, ADV7183_IN_CTRL, reg);
362 reg = adv7183_read(sd, ADV7183_STATUS_1);
394 adv7183_s_std(sd, decoder->std);
398 static int adv7183_g_input_status(struct v4l2_subdev *sd, u32 *status)
403 reg = adv7183_read(sd, ADV7183_STATUS_1);
411 static int adv7183_enum_mbus_code(struct v4l2_subdev *sd,
422 static int adv7183_set_fmt(struct v4l2_subdev *sd,
426 struct adv7183 *decoder = to_adv7183(sd);
450 static int adv7183_get_fmt(struct v4l2_subdev *sd,
454 struct adv7183 *decoder = to_adv7183(sd);
463 static int adv7183_s_stream(struct v4l2_subdev *sd, int enable)
465 struct adv7183 *decoder = to_adv7183(sd);
476 static int adv7183_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
478 reg->val = adv7183_read(sd, reg->reg & 0xff);
483 static int adv7183_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg)
485 adv7183_write(sd, reg->reg & 0xff, reg->val & 0xff);
528 struct v4l2_subdev *sd;
567 sd = &decoder->sd;
568 v4l2_i2c_subdev_init(sd, client, &adv7183_ops);
581 sd->ctrl_handler = hdl;
601 adv7183_writeregs(sd, adv7183_init_regs, ARRAY_SIZE(adv7183_init_regs));
602 adv7183_s_std(sd, decoder->std);
605 adv7183_set_fmt(sd, NULL, &fmt);
619 struct v4l2_subdev *sd = i2c_get_clientdata(client);
621 v4l2_device_unregister_subdev(sd);
622 v4l2_ctrl_handler_free(sd->ctrl_handler);