Lines Matching defs:state
82 static int ves1x93_writereg (struct ves1x93_state* state, u8 reg, u8 data)
85 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 3 };
88 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
96 static u8 ves1x93_readreg (struct ves1x93_state* state, u8 reg)
101 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 2 },
102 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
104 ret = i2c_transfer (state->i2c, msg, 2);
111 static int ves1x93_clr_bit (struct ves1x93_state* state)
114 ves1x93_writereg (state, 0, state->init_1x93_tab[0] & 0xfe);
115 ves1x93_writereg (state, 0, state->init_1x93_tab[0]);
120 static int ves1x93_set_inversion(struct ves1x93_state *state,
144 return ves1x93_writereg (state, 0x0c, (state->init_1x93_tab[0x0c] & 0x3f) | val);
147 static int ves1x93_set_fec(struct ves1x93_state *state, enum fe_code_rate fec)
150 return ves1x93_writereg (state, 0x0d, 0x08);
154 return ves1x93_writereg (state, 0x0d, fec - FEC_1_2);
157 static enum fe_code_rate ves1x93_get_fec(struct ves1x93_state *state)
159 return FEC_1_2 + ((ves1x93_readreg (state, 0x0d) >> 4) & 0x7);
162 static int ves1x93_set_symbolrate (struct ves1x93_state* state, u32 srate)
173 if (srate > state->config->xin/2)
174 srate = state->config->xin/2;
181 FIN = (state->config->xin + 6000) >> 4;
226 ves1x93_writereg (state, 0x06, 0xff & BDR);
227 ves1x93_writereg (state, 0x07, 0xff & (BDR >> 8));
228 ves1x93_writereg (state, 0x08, 0x0f & (BDR >> 16));
230 ves1x93_writereg (state, 0x09, BDRI);
231 ves1x93_writereg (state, 0x20, ADCONF);
232 ves1x93_writereg (state, 0x21, FCONF);
234 AGCR = state->init_1x93_tab[0x05];
235 if (state->config->invert_pwm)
243 ves1x93_writereg (state, 0x05, AGCR);
246 if (state->demod_type != DEMOD_VES1993)
247 ves1x93_clr_bit (state);
254 struct ves1x93_state* state = fe->demodulator_priv;
260 for (i = 0; i < state->tab_size; i++) {
261 if (state->init_1x93_wtab[i]) {
262 val = state->init_1x93_tab[i];
264 if (state->config->invert_pwm && (i == 0x05)) val |= 0x20; /* invert PWM */
265 ves1x93_writereg (state, i, val);
275 struct ves1x93_state* state = fe->demodulator_priv;
279 return ves1x93_writereg (state, 0x1f, 0x20);
281 return ves1x93_writereg (state, 0x1f, 0x30);
283 return ves1x93_writereg (state, 0x1f, 0x00);
292 struct ves1x93_state* state = fe->demodulator_priv;
294 u8 sync = ves1x93_readreg (state, 0x0e);
308 sync = ves1x93_readreg (state, 0x0e);
333 struct ves1x93_state* state = fe->demodulator_priv;
335 *ber = ves1x93_readreg (state, 0x15);
336 *ber |= (ves1x93_readreg (state, 0x16) << 8);
337 *ber |= ((ves1x93_readreg (state, 0x17) & 0x0F) << 16);
345 struct ves1x93_state* state = fe->demodulator_priv;
347 u8 signal = ~ves1x93_readreg (state, 0x0b);
355 struct ves1x93_state* state = fe->demodulator_priv;
357 u8 _snr = ~ves1x93_readreg (state, 0x1c);
365 struct ves1x93_state* state = fe->demodulator_priv;
367 *ucblocks = ves1x93_readreg (state, 0x18) & 0x7f;
372 ves1x93_writereg (state, 0x18, 0x00); /* reset the counter */
373 ves1x93_writereg (state, 0x18, 0x80); /* dto. */
381 struct ves1x93_state* state = fe->demodulator_priv;
387 ves1x93_set_inversion (state, p->inversion);
388 ves1x93_set_fec(state, p->fec_inner);
389 ves1x93_set_symbolrate(state, p->symbol_rate);
390 state->inversion = p->inversion;
391 state->frequency = p->frequency;
399 struct ves1x93_state* state = fe->demodulator_priv;
402 afc = ((int)((char)(ves1x93_readreg (state, 0x0a) << 1)))/2;
405 p->frequency = state->frequency - afc;
411 if (state->inversion == INVERSION_AUTO)
412 p->inversion = (ves1x93_readreg (state, 0x0f) & 2) ?
414 p->fec_inner = ves1x93_get_fec(state);
422 struct ves1x93_state* state = fe->demodulator_priv;
424 return ves1x93_writereg (state, 0x00, 0x08);
429 struct ves1x93_state* state = fe->demodulator_priv;
430 kfree(state);
435 struct ves1x93_state* state = fe->demodulator_priv;
438 return ves1x93_writereg(state, 0x00, 0x11);
440 return ves1x93_writereg(state, 0x00, 0x01);
449 struct ves1x93_state* state = NULL;
452 /* allocate memory for the internal state */
453 state = kzalloc(sizeof(struct ves1x93_state), GFP_KERNEL);
454 if (state == NULL) goto error;
456 /* setup the state */
457 state->config = config;
458 state->i2c = i2c;
459 state->inversion = INVERSION_OFF;
462 identity = ves1x93_readreg(state, 0x1e);
466 state->demod_type = DEMOD_VES1893;
467 state->init_1x93_tab = init_1893_tab;
468 state->init_1x93_wtab = init_1893_wtab;
469 state->tab_size = sizeof(init_1893_tab);
474 state->demod_type = DEMOD_VES1893;
475 state->init_1x93_tab = init_1893_tab;
476 state->init_1x93_wtab = init_1893_wtab;
477 state->tab_size = sizeof(init_1893_tab);
482 state->demod_type = DEMOD_VES1993;
483 state->init_1x93_tab = init_1993_tab;
484 state->init_1x93_wtab = init_1993_wtab;
485 state->tab_size = sizeof(init_1993_tab);
493 memcpy(&state->frontend.ops, &ves1x93_ops, sizeof(struct dvb_frontend_ops));
494 state->frontend.demodulator_priv = state;
495 return &state->frontend;
498 kfree(state);