Lines Matching defs:m_Regs
84 u8 m_Regs[NUM_REGS];
161 &state->m_Regs[RegFrom], RegTo-RegFrom+1);
165 return WriteReg(state, Reg, state->m_Regs[Reg]);
259 state->m_Regs[TM] |= 0x10;
268 state->m_Regs[TM] ^= 0x20;
280 state->m_Regs[TM] &= ~0x10; /* Thermometer off */
284 state->m_Regs[EP4] &= ~0x03; /* CAL_mode = 0 ????????? */
297 state->m_Regs[EB12] &= ~0x20; /* PD_AGC1_Det = 0 */
301 state->m_Regs[EB18] &= ~0x83; /* AGC1_loop_off = 0, AGC1_Gain = 6 dB */
305 state->m_Regs[EB21] |= 0x03; /* AGC2_Gain = -6 dB */
306 state->m_Regs[EP3] = state->m_EP3_Standby;
310 state->m_Regs[EB23] &= ~0x06; /* ForceLP_Fc2_En = 0, LP_Fc[2] = 0 */
334 state->m_Regs[MPD] = PostDiv & 0x77;
335 state->m_Regs[MD1] = ((MainDiv >> 16) & 0x7F);
336 state->m_Regs[MD2] = ((MainDiv >> 8) & 0xFF);
337 state->m_Regs[MD3] = (MainDiv & 0xFF);
358 state->m_Regs[CPD] = PostDiv;
359 state->m_Regs[CD1] = ((CalDiv >> 16) & 0xFF);
360 state->m_Regs[CD2] = ((CalDiv >> 8) & 0xFF);
361 state->m_Regs[CD3] = (CalDiv & 0xFF);
377 state->m_Regs[EP4] &= ~0x03; /* CAL_mode = 0 */
381 state->m_Regs[EB18] |= 0x03; /* AGC1_Gain = 3 */
388 if (state->m_Regs[ID] != 0x83) /* C1: ID == 83, C2: ID == 84 */
389 state->m_Regs[EP3] |= 0x40; /* SM_LT = 1 */
396 state->m_Regs[EP1] = (state->m_Regs[EP1] & ~0x07) | BP_Filter;
397 state->m_Regs[EP2] = (RFBand << 5) | GainTaper;
399 state->m_Regs[EB13] = (state->m_Regs[EB13] & ~0x7C) | (RFC_K << 4) | (RFC_M << 2);
408 state->m_Regs[EB4] |= 0x20; /* LO_ForceSrce = 1 */
413 state->m_Regs[EB7] |= 0x20; /* CAL_ForceSrce = 1 */
418 state->m_Regs[EB14] = 0; /* RFC_Cprog = 0 */
423 state->m_Regs[EB20] &= ~0x20; /* ForceLock = 0; */
428 state->m_Regs[EP4] |= 0x03; /* CAL_Mode = 3 */
454 state->m_Regs[EB4] &= ~0x20; /* LO_ForceSrce = 0 */
459 state->m_Regs[EB7] &= ~0x20; /* CAL_ForceSrce = 0 */
465 state->m_Regs[EB20] |= 0x20; /* ForceLock = 1; */
471 state->m_Regs[EP4] &= ~0x03; /* CAL_Mode = 0 */
472 state->m_Regs[EP3] &= ~0x40; /* SM_LT = 0 */
473 state->m_Regs[EB18] &= ~0x03; /* AGC1_Gain = 0 */
606 state->m_Regs[EP2] = (RFBand << 5) | Gain_Taper;
607 state->m_Regs[EB14] = (RFC_Cprog);
620 state->m_Regs[EP4] = (state->m_Regs[EP4] & ~0x03) | 1; /* CAL_mode = 1 */
631 state->m_Regs[ID] = Regs[ID]; /* Chip version, (needed for C1 workaround in CalibrateRF) */
676 state->m_Regs[EP3] = (state->m_Regs[EP3] & ~0x1F) | 0x12;
677 state->m_Regs[EP4] = (state->m_Regs[EP4] & ~0x1F); /* If level = 0, Cal mode = 0 */
681 state->m_Regs[EB18] = (state->m_Regs[EB18] & ~0x03); /* AGC 1 Gain = 0 */
685 state->m_Regs[EB21] = (state->m_Regs[EB21] & ~0x03); /* AGC 2 Gain = 0 (Datasheet = 3) */
686 state->m_Regs[EB23] = (state->m_Regs[EB23] | 0x06); /* ForceLP_Fc2_En = 1, LPFc[2] = 1 */
746 memcpy(&state->m_Regs[TM], InitRegs, EB23 - TM + 1);
753 state->m_Regs[EB17] = 0x00;
757 state->m_Regs[EB17] = 0x03;
761 state->m_Regs[EB17] = 0x43;
765 state->m_Regs[EB17] = 0x4C;
771 state->m_Regs[EP3] = 0x1F;
772 state->m_Regs[EP4] = 0x66;
773 state->m_Regs[EP5] = 0x81;
774 state->m_Regs[CPD] = 0xCC;
775 state->m_Regs[CD1] = 0x6C;
776 state->m_Regs[CD2] = 0x00;
777 state->m_Regs[CD3] = 0x00;
778 state->m_Regs[MPD] = 0xC5;
779 state->m_Regs[MD1] = 0x77;
780 state->m_Regs[MD2] = 0x08;
781 state->m_Regs[MD3] = 0x00;
787 state->m_Regs[EB4] = 0x61; /* missing in sw */
792 state->m_Regs[EB4] = 0x41;
804 state->m_Regs[EP5] = 0x85;
805 state->m_Regs[CPD] = 0xCB;
806 state->m_Regs[CD1] = 0x66;
807 state->m_Regs[CD2] = 0x70;
818 state->m_Regs[EP5] = 0x82;
819 state->m_Regs[CPD] = 0xA8;
820 state->m_Regs[CD2] = 0x00;
821 state->m_Regs[MPD] = 0xA1; /* Datasheet = 0xA9 */
822 state->m_Regs[MD1] = 0x73;
823 state->m_Regs[MD2] = 0x1A;
834 state->m_Regs[EP5] = 0x86;
835 state->m_Regs[CPD] = 0xA8;
836 state->m_Regs[CD1] = 0x66;
837 state->m_Regs[CD2] = 0xA0;
848 state->m_Regs[EP5] = 0x83;
849 state->m_Regs[CPD] = 0x98;
850 state->m_Regs[CD1] = 0x65;
851 state->m_Regs[CD2] = 0x00;
852 state->m_Regs[MPD] = 0x91; /* Datasheet = 0x91 */
853 state->m_Regs[MD1] = 0x71;
854 state->m_Regs[MD2] = 0xCD;
863 state->m_Regs[EP5] = 0x87;
864 state->m_Regs[CD1] = 0x65;
865 state->m_Regs[CD2] = 0x50;
876 state->m_Regs[EP4] = 0x64;
933 state->m_Regs[EP3] &= ~0xE0; /* Power up */
959 state->m_Regs[EB14] = Capprox;
995 state->m_Regs[EP3] = (state->m_Regs[EP3] & ~0x1F) | m_StandardTable[Standard].m_EP3_4_0;
996 state->m_Regs[EP3] &= ~0x04; /* switch RFAGC to high speed mode */
999 state->m_Regs[EP4] = state->m_EP4 | ((Standard > HF_AnalogMax) ? state->m_IFLevelDigital : state->m_IFLevelAnalog);
1000 /* state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDigital; */
1002 state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelAnalog;
1004 state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDVBT;
1006 state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDVBC;
1008 state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDigital;
1011 state->m_Regs[EP4] |= 0x80;
1013 state->m_Regs[MPD] &= ~0x80;
1015 state->m_Regs[MPD] |= 0x80; /* Add IF_notch for digital */
1017 state->m_Regs[EB22] = m_StandardTable[Standard].m_EB22;
1021 state->m_Regs[EB23] |= 0x06; /* ForceLP_Fc2_En = 1, LPFc[2] = 1 */
1023 state->m_Regs[EB23] &= ~0x06; /* ForceLP_Fc2_En = 0, LPFc[2] = 0 */
1029 state->m_Regs[EP1] = (state->m_Regs[EP1] & ~0x07) | 0x40 | BP_Filter; /* Dis_Power_level = 1, Filter */
1030 state->m_Regs[EP5] = (state->m_Regs[EP5] & ~0x07) | IR_Meas;
1031 state->m_Regs[EP2] = (RF_Band << 5) | GainTaper;
1033 state->m_Regs[EB1] = (state->m_Regs[EB1] & ~0x07) |
1048 state->m_Regs[EB4] |= 0x20; /* LO_forceSrce = 1 */
1053 state->m_Regs[EB4] &= ~0x20; /* LO_forceSrce = 0 */
1065 state->m_Regs[MPD] = (state->m_Regs[MPD] & ~0x7F) | (PostDiv & 0x77);
1073 state->m_Regs[EB7] |= 0x20; /* CAL_forceSrce = 1 */
1078 state->m_Regs[EB7] &= ~0x20; /* CAL_forceSrce = 0 */
1085 state->m_Regs[EP3] |= 0x04; /* RFAGC to normal mode */