Lines Matching refs:x00
148 tda10023_writereg (state, 0x00, reg0 & 0xfe);
149 tda10023_writereg (state, 0x00, reg0 | 0x01);
223 /* 003 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
225 /* 009 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
231 /* 018 */ 0x00, 0xff, REG0_INIT_VAL,
233 /* 024 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
234 /* 027 */ 0x1f, 0xff, 0x00, /* RESET */
235 /* 030 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
247 /* 060 */ 0x3c, 0xff, 0x00, /* IFMIN */
248 /* 063 */ 0x34, 0xff, 0x00, /* PWMREF */
250 /* 069 */ 0x36, 0xff, 0x00, /* TUNMIN */
257 /* 090 */ 0x04, 0x10, 0x00, /* SWRAMP=1 */
263 /* 105 */ 0xc4, 0xff, 0x00,
264 /* 108 */ 0xc3, 0x30, 0x00,
266 /* 114 */ 0x00, 0x03, 0x01, /* GPR, CLBS soft reset */
267 /* 117 */ 0x00, 0x03, 0x03, /* GPR, CLBS soft reset */
268 /* 120 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
398 tda10023_writebit (state, 0x10, 0xc0, 0x00);
439 tda10023_writebit (state, 0x10, 0x20,0x00);
441 tda10023_writebit (state, 0x13, 0x01, 0x00);
482 tda10023_writereg (state, 0x00, 0x80); /* standby */
522 tda10023_writereg (state, 0x00, 0x33);