Lines Matching defs:state
52 static u8 tda10023_readreg (struct tda10023_state* state, u8 reg)
56 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
57 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
60 ret = i2c_transfer (state->i2c, msg, 2);
62 int num = state->frontend.dvb ? state->frontend.dvb->num : -1;
69 static int tda10023_writereg (struct tda10023_state* state, u8 reg, u8 data)
72 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
75 ret = i2c_transfer (state->i2c, &msg, 1);
77 int num = state->frontend.dvb ? state->frontend.dvb->num : -1;
85 static int tda10023_writebit (struct tda10023_state* state, u8 reg, u8 mask,u8 data)
88 return tda10023_writereg(state, reg, data);
91 val=tda10023_readreg(state,reg);
94 return tda10023_writereg(state, reg, val);
98 static void tda10023_writetab(struct tda10023_state* state, u8* tab)
112 tda10023_writebit(state,r,m,v);
117 static int lock_tuner(struct tda10023_state* state)
120 struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
122 if(i2c_transfer(state->i2c, &msg, 1) != 1)
131 static int unlock_tuner(struct tda10023_state* state)
134 struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
136 if(i2c_transfer(state->i2c, &msg_post, 1) != 1)
144 static int tda10023_setup_reg0 (struct tda10023_state* state, u8 reg0)
146 reg0 |= state->reg0 & 0x63;
148 tda10023_writereg (state, 0x00, reg0 & 0xfe);
149 tda10023_writereg (state, 0x00, reg0 | 0x01);
151 state->reg0 = reg0;
155 static int tda10023_set_symbolrate (struct tda10023_state* state, u32 sr)
164 u32 sysclk_x_10 = state->sysclk * 10;
189 BDRI = (state->sysclk)*16;
202 do_div(BDRX, state->sysclk); /* BDRX/=SYSCLK; */
208 tda10023_writebit (state, 0x03, 0xc0, NDEC<<6);
209 tda10023_writereg (state, 0x0a, BDR&255);
210 tda10023_writereg (state, 0x0b, (BDR>>8)&255);
211 tda10023_writereg (state, 0x0c, (BDR>>16)&31);
212 tda10023_writereg (state, 0x0d, BDRI);
213 tda10023_writereg (state, 0x3d, (SFIL<<7));
219 struct tda10023_state* state = fe->demodulator_priv;
227 /* 012 */ 0x28, 0xff, (state->pll_m-1),
229 /* 015 */ 0x29, 0xff, ((state->pll_p-1)<<6)|(state->pll_n-1),
274 if (state->config->deltaf) {
275 tda10023_inittab[80] = (state->config->deltaf & 0xff);
276 tda10023_inittab[83] = (state->config->deltaf >> 8);
279 if (state->config->output_mode)
280 tda10023_inittab[95] = state->config->output_mode;
282 tda10023_writetab(state, tda10023_inittab);
297 struct tda10023_state* state = fe->demodulator_priv;
343 tda10023_set_symbolrate(state, c->symbol_rate);
344 tda10023_writereg(state, 0x05, qam_params[qam].lockthr);
345 tda10023_writereg(state, 0x08, qam_params[qam].mseth);
346 tda10023_writereg(state, 0x09, qam_params[qam].aref);
347 tda10023_writereg(state, 0xb4, qam_params[qam].agcrefnyq);
348 tda10023_writereg(state, 0xb6, qam_params[qam].eragnyq_thd);
350 tda10023_writereg(state, 0x04, (c->inversion ? 0x12 : 0x32));
351 tda10023_writebit(state, 0x04, 0x60, (c->inversion ? 0 : 0x20));
353 tda10023_writebit(state, 0x04, 0x40, 0x40);
356 tda10023_writebit(state, 0x3d, 0xfc, 0x03);
358 tda10023_writebit(state, 0x3d, 0xfc, 0x02);
360 tda10023_setup_reg0(state, qam_params[qam].qam);
368 struct tda10023_state* state = fe->demodulator_priv;
377 sync = tda10023_readreg (state, 0x11);
393 struct tda10023_state* state = fe->demodulator_priv;
395 a=tda10023_readreg(state, 0x14);
396 b=tda10023_readreg(state, 0x15);
397 c=tda10023_readreg(state, 0x16)&0xf;
398 tda10023_writebit (state, 0x10, 0xc0, 0x00);
406 struct tda10023_state* state = fe->demodulator_priv;
407 u8 ifgain=tda10023_readreg(state, 0x2f);
409 u16 gain = ((255-tda10023_readreg(state, 0x17))) + (255-ifgain)/16;
422 struct tda10023_state* state = fe->demodulator_priv;
424 u8 quality = ~tda10023_readreg(state, 0x18);
431 struct tda10023_state* state = fe->demodulator_priv;
433 a= tda10023_readreg (state, 0x74);
434 b= tda10023_readreg (state, 0x75);
435 c= tda10023_readreg (state, 0x76);
436 d= tda10023_readreg (state, 0x77);
439 tda10023_writebit (state, 0x10, 0x20,0x00);
440 tda10023_writebit (state, 0x10, 0x20,0x20);
441 tda10023_writebit (state, 0x13, 0x01, 0x00);
449 struct tda10023_state* state = fe->demodulator_priv;
453 sync = tda10023_readreg(state, 0x11);
454 afc = tda10023_readreg(state, 0x19);
455 inv = tda10023_readreg(state, 0x04);
461 state->frontend.dvb->num, afc,
466 p->modulation = ((state->reg0 >> 2) & 7) + QAM_16;
479 struct tda10023_state* state = fe->demodulator_priv;
481 tda10023_writereg (state, 0x1b, 0x02); /* pdown ADC */
482 tda10023_writereg (state, 0x00, 0x80); /* standby */
489 struct tda10023_state* state = fe->demodulator_priv;
492 lock_tuner(state);
494 unlock_tuner(state);
501 struct tda10023_state* state = fe->demodulator_priv;
502 kfree(state);
511 struct tda10023_state* state = NULL;
513 /* allocate memory for the internal state */
514 state = kzalloc(sizeof(struct tda10023_state), GFP_KERNEL);
515 if (state == NULL) goto error;
517 /* setup the state */
518 state->config = config;
519 state->i2c = i2c;
522 tda10023_writereg (state, 0x00, 0x33);
524 if ((tda10023_readreg(state, 0x1a) & 0xf0) != 0x70) goto error;
527 memcpy(&state->frontend.ops, &tda10023_ops, sizeof(struct dvb_frontend_ops));
528 state->pwm = pwm;
529 state->reg0 = REG0_INIT_VAL;
530 if (state->config->xtal) {
531 state->xtal = state->config->xtal;
532 state->pll_m = state->config->pll_m;
533 state->pll_p = state->config->pll_p;
534 state->pll_n = state->config->pll_n;
537 state->xtal = 28920000;
538 state->pll_m = 8;
539 state->pll_p = 4;
540 state->pll_n = 1;
544 state->sysclk = (state->xtal * state->pll_m / \
545 (state->pll_n * state->pll_p));
547 state->frontend.ops.info.symbol_rate_min = (state->sysclk/2)/64;
548 state->frontend.ops.info.symbol_rate_max = (state->sysclk/2)/4;
551 __func__, state->xtal, state->pll_m, state->pll_p,
552 state->pll_n);
554 state->frontend.demodulator_priv = state;
555 return &state->frontend;
558 kfree(state);