Lines Matching refs:reg

34 	u8 reg[11];
81 	/* Gain *100dB // reg */
117 	/* Gain *100dB // reg */
177 	/* Gain *100dB // reg */
236 	/* Gain *100dB // reg */
330 static int write_regs(struct stv *state, int reg, int len)
334 	memcpy(&d[1], &state->reg[reg], len);
335 	d[0] = reg;
339 static int write_reg(struct stv *state, u8 reg, u8 val)
341 	u8 d[2] = {reg, val};
346 static int read_reg(struct stv *state, u8 reg, u8 *val)
348 	return i2c_read(state->i2c, state->adr, &reg, 1, val, 1);
381 	state->reg[0] = 0x08;
382 	state->reg[1] = 0x41;
383 	state->reg[2] = 0x8f;
384 	state->reg[3] = 0x00;
385 	state->reg[4] = 0xce;
386 	state->reg[5] = 0x54;
387 	state->reg[6] = 0x55;
388 	state->reg[7] = 0x45;
389 	state->reg[8] = 0x46;
390 	state->reg[9] = 0xbd;
391 	state->reg[10] = 0x11;
396 		state->reg[0x00] |= (clkdiv & 0x03);
398 		state->reg[0x03] |= (agcmode << 5);
400 			state->reg[0x01] |= 0x30;
403 		state->reg[0x01] = (state->reg[0x01] & ~0x30) | (bbmode << 4);
405 		state->reg[0x03] |= agcref;
407 		state->reg[0x02] = (state->reg[0x02] & ~0x1F) | agcset | 0x40;
433 	if ((state->reg[0x08] & ~0xFC) == ((index - 6) << 2))
436 	state->reg[0x08] = (state->reg[0x08] & ~0xFC) | ((index - 6) << 2);
437 	state->reg[0x09] = (state->reg[0x09] & ~0x0C) | 0x08;
489 	state->reg[0x02] |= 0x80; /* LNA IIP3 Mode */
491 	state->reg[0x03] = (state->reg[0x03] & ~0x80) | (psel << 7);
492 	state->reg[0x04] = (div & 0xFF);
493 	state->reg[0x05] = (((div >> 8) & 0x01) | ((frac & 0x7F) << 1)) & 0xff;
494 	state->reg[0x06] = ((frac >> 7) & 0xFF);
495 	state->reg[0x07] = (state->reg[0x07] & ~0x07) | ((frac >> 15) & 0x07);
496 	state->reg[0x07] = (state->reg[0x07] & ~0xE0) | (icp << 5);
498 	state->reg[0x08] = (state->reg[0x08] & ~0xFC) | ((index - 6) << 2);
500 	state->reg[0x09] = (state->reg[0x09] & ~0x0C) | 0x0C;
509 		state->reg[0x02] &= ~0x80; /* LNA NF Mode */
580 	if ((state->reg[0x03] & 0x60) == 0) {
582 		u8 reg = 0;
588 			write_reg(state, 0x02, state->reg[0x02] | 0x20);
589 			read_reg(state, 2, &reg);
590 			if (reg & 0x20)
591 				read_reg(state, 2, &reg);
596 		if ((state->reg[0x02] & 0x80) == 0)
600 					    reg & 0x1F);
605 					    reg & 0x1F);
613 		if ((state->reg[0x02] & 0x80) == 0) {
634 	gain +=  (s32)((state->reg[0x01] & 0xC0) >> 6) * 600 - 1300;