Lines Matching refs:data
279 u8 reg, u8 write, const u8 *data, u32 len)
283 print_hex_dump_bytes("helene: I2C data: ",
284 DUMP_PREFIX_OFFSET, data, len);
288 u8 reg, const u8 *data, u32 len)
308 helene_i2c_debug(priv, reg, 1, data, len);
310 memcpy(&buf[1], data, len);
376 u8 reg, u8 data, u8 mask)
385 data = ((data & mask) | (rdata & (mask ^ 0xFF)));
387 return helene_write_reg(priv, reg, data);
512 u8 data[MAX_WRITE_REGSIZE];
542 data[0] = 0x00;
543 data[1] = 0x00;
544 helene_write_regs(priv, 0x6A, data, 2);
555 data[0] = 0xC4;
556 data[1] = 0x40;
560 data[2] = 0x02;
563 data[2] = 0x02;
566 data[2] = 0x03;
569 data[2] = 0x05;
578 data[3] = 0x80;
584 data[4] = 0x58;
586 data[4] = 0x70;
588 data[5] = 0x1E;
589 data[6] = 0x02;
590 data[7] = 0x24;
593 data[8] = 0x0F;
594 data[8] |= 0xE0; /* POWERSAVE_TERR_RF_ACTIVE */
595 data[9] = 0x02;
596 data[10] = 0x1E;
601 data[11] = 0x22; /* 22MHz */
605 data[11] = 0x05;
607 data[11] = (uint8_t)((symbol_rate * 47
610 data[11] = (uint8_t)((symbol_rate * 27
613 if (data[11] > 36)
614 data[11] = 36; /* 5 <= lpf_cutoff <= 36 is valid */
618 data[11] = 0x05;
620 data[11] = (uint8_t)((symbol_rate * 11
623 data[11] = (uint8_t)((symbol_rate * 3
626 if (data[11] > 36)
627 data[11] = 36; /* 5 <= lpf_cutoff <= 36 is valid */
637 data[12] = (uint8_t)(frequency4kHz & 0xFF); /* FRF_L */
638 data[13] = (uint8_t)((frequency4kHz >> 8) & 0xFF); /* FRF_M */
640 data[14] = (uint8_t)((frequency4kHz >> 16) & 0x0F);
643 data[15] = 0xFF;
646 data[16] = 0x00;
649 data[17] = 0x01;
651 helene_write_regs(priv, 0x04, data, 18);
662 u8 data[MAX_WRITE_REGSIZE];
694 data[0] = 0x16;
695 data[1] = 0x26;
697 data[0] = 0x10;
698 data[1] = 0x20;
700 helene_write_regs(priv, 0x91, data, 2);
704 data[0] = 0x90;
706 data[0] = 0x00;
709 data[1] = (uint8_t)(terr_params[tv_system].IS_LOWERLOCAL & 0x01);
710 helene_write_regs(priv, 0x9C, data, 2);
713 data[0] = 0xEE;
714 data[1] = 0x02;
715 data[2] = 0x1E;
716 data[3] = 0x67; /* Tuning setting for CPU */
721 data[4] = 0x18;
723 data[4] = 0x03;
727 data[5] = 0x38;
728 data[6] = 0x1E;
729 data[7] = 0x02;
730 data[8] = 0x24;
733 data[5] = 0x1C;
734 data[6] = 0x78;
735 data[7] = 0x08;
736 data[8] = 0x1C;
738 data[5] = 0xB4;
739 data[6] = 0x78;
740 data[7] = 0x08;
741 data[8] = 0x30;
743 helene_write_regs(priv, 0x5E, data, 9);
749 data[0] = 0x00; /* 1.5Vpp */
753 data[1] = 0x80; /* RF_GAIN_SEL = 1 */
755 data[1] = (uint8_t)((terr_params[tv_system].RF_GAIN
759 data[1] |= (uint8_t)(terr_params[tv_system].IF_BPF_GC & 0x0F);
762 data[2] = 0x00;
764 data[3] = (uint8_t)(terr_params[tv_system].RFOVLD_DET_LV1_VL
766 data[4] = (uint8_t)(terr_params[tv_system].IFOVLD_DET_LV_VL
769 data[3] = (uint8_t)(terr_params[tv_system].RFOVLD_DET_LV1_VH
771 data[4] = (uint8_t)(terr_params[tv_system].IFOVLD_DET_LV_VH
774 data[3] = (uint8_t)(terr_params[tv_system].RFOVLD_DET_LV1_U
776 data[4] = (uint8_t)(terr_params[tv_system].IFOVLD_DET_LV_U
779 data[4] |= 0x20;
784 data[5] = (uint8_t)((terr_params[tv_system].IF_BPF_F0 << 4) & 0x30);
787 data[5] |= (uint8_t)(terr_params[tv_system].BW & 0x03);
790 data[6] = (uint8_t)(terr_params[tv_system].FIF_OFFSET & 0x1F);
793 data[7] = (uint8_t)(terr_params[tv_system].BW_OFFSET & 0x1F);
796 data[8] = (uint8_t)(frequencykHz & 0xFF); /* FRF_L */
797 data[9] = (uint8_t)((frequencykHz >> 8) & 0xFF); /* FRF_M */
798 data[10] = (uint8_t)((frequencykHz >> 16)
802 data[11] = 0xFF;
805 data[12] = 0x01;
809 data[13] = 0xD9;
810 data[14] = 0x0F;
811 data[15] = 0x24;
812 data[16] = 0x87;
814 data[13] = 0x99;
815 data[14] = 0x00;
816 data[15] = 0x24;
817 data[16] = 0x87;
820 helene_write_regs(priv, 0x68, data, 17);
903 u8 data[20];
919 data[0] = 0x10; /* xtal 16 MHz */
921 data[0] = 0x18; /* xtal 24 MHz */
922 data[1] = (uint8_t)(0x80 | (0x04 & 0x1F)); /* 4 x 25 = 100uA */
923 data[2] = (uint8_t)(0x80 | (0x26 & 0x7F)); /* 38 x 0.25 = 9.5pF */
924 data[3] = 0x80; /* REFOUT signal output 500mVpp */
925 data[4] = 0x00; /* GPIO settings */
926 data[5] = 0x00; /* GPIO settings */
927 data[6] = 0xC4; /* Clock enable for internal logic block */
928 data[7] = 0x40; /* Start CPU boot-up */
929 data[8] = 0x10; /* For burst-write */
932 data[9] = 0x00;
933 data[10] = 0x45;
934 data[11] = 0x75;
936 data[12] = 0x07; /* Setting for analog block */
939 data[13] = 0x1C;
940 data[14] = 0x3F;
941 data[15] = 0x02;
942 data[16] = 0x10;
943 data[17] = 0x20;
944 data[18] = 0x0A;
945 data[19] = 0x00;
947 helene_write_regs(priv, 0x81, data, sizeof(data));
968 helene_read_reg(priv, 0x19, data);
969 helene_write_reg(priv, 0x95, (uint8_t)((data[0] >> 4) & 0x0F));