Lines Matching refs:data
228 static int ds3000_writereg(struct ds3000_state *state, int reg, int data)
230 u8 buf[] = { reg, data };
235 dprintk("%s: write reg 0x%02x, value 0x%02x\n", __func__, reg, data);
240 __func__, err, reg, data);
261 const u8 *data, u16 len)
279 memcpy(buf + 1, data + i, 32);
379 fw->data[0],
380 fw->data[1],
381 fw->data[fw->size - 2],
382 fw->data[fw->size - 1]);
387 ret = ds3000_writeFW(state, 0xb0, fw->data, fw->size);
397 u8 data;
401 data = ds3000_readreg(state, 0xa2);
402 data |= 0x03; /* bit0 V/H, bit1 off/on */
406 data &= ~0x03;
409 data &= ~0x03;
410 data |= 0x01;
416 ds3000_writereg(state, 0xa2, data);
463 u8 data;
474 data = ds3000_readreg(state, 0xf8);
476 if ((data & 0x10) == 0) {
485 data |= 0x10;
486 ds3000_writereg(state, 0xf8, data);
487 ds3000_writereg(state, 0xf8, data);
623 u8 data;
632 data = ds3000_readreg(state, 0xf8);
634 data &= ~0x20;
635 ds3000_writereg(state, 0xf8, data);
637 data |= 0x20;
638 ds3000_writereg(state, 0xf8, data);
659 u8 data;
667 data = ds3000_readreg(state, 0xa2);
668 data &= ~0xc0;
669 ds3000_writereg(state, 0xa2, data);
674 data = ds3000_readreg(state, 0xa1);
675 data &= ~0x43;
676 data |= 0x04;
677 ds3000_writereg(state, 0xa1, data);
681 data = ds3000_readreg(state, 0xa2);
682 data |= 0x80;
683 ds3000_writereg(state, 0xa2, data);
695 u8 data;
706 data = ds3000_readreg(state, 0xa2);
707 data &= ~0xc0;
708 ds3000_writereg(state, 0xa2, data);
714 data = ds3000_readreg(state, 0xa1);
717 data &= ~0xf8;
720 data |= ((d->msg_len - 1) << 3) | 0x07;
721 ds3000_writereg(state, 0xa1, data);
725 data = ds3000_readreg(state, 0xa1);
726 if ((data & 0x40) == 0)
733 data = ds3000_readreg(state, 0xa1);
734 data &= ~0x80;
735 data |= 0x40;
736 ds3000_writereg(state, 0xa1, data);
738 data = ds3000_readreg(state, 0xa2);
739 data &= ~0xc0;
740 data |= 0x80;
741 ds3000_writereg(state, 0xa2, data);
746 data = ds3000_readreg(state, 0xa2);
747 data &= ~0xc0;
748 data |= 0x80;
749 ds3000_writereg(state, 0xa2, data);
760 u8 data;
764 data = ds3000_readreg(state, 0xa2);
765 data &= ~0xc0;
766 ds3000_writereg(state, 0xa2, data);
780 data = ds3000_readreg(state, 0xa1);
781 if ((data & 0x40) == 0)
787 data = ds3000_readreg(state, 0xa1);
788 data &= ~0x80;
789 data |= 0x40;
790 ds3000_writereg(state, 0xa1, data);
792 data = ds3000_readreg(state, 0xa2);
793 data &= ~0xc0;
794 data |= 0x80;
795 ds3000_writereg(state, 0xa2, data);
800 data = ds3000_readreg(state, 0xa2);
801 data &= ~0xc0;
802 data |= 0x80;
803 ds3000_writereg(state, 0xa2, data);