Lines Matching defs:state
228 static int ds3000_writereg(struct ds3000_state *state, int reg, int data)
231 struct i2c_msg msg = { .addr = state->config->demod_address,
237 err = i2c_transfer(state->i2c, &msg, 1);
249 struct ds3000_state *state = fe->demodulator_priv;
252 ds3000_writereg(state, 0x03, 0x12);
254 ds3000_writereg(state, 0x03, 0x02);
260 static int ds3000_writeFW(struct ds3000_state *state, int reg,
273 msg.addr = state->config->demod_address;
283 ret = i2c_transfer(state->i2c, &msg, 1);
299 static int ds3000_readreg(struct ds3000_state *state, u8 reg)
306 .addr = state->config->demod_address,
311 .addr = state->config->demod_address,
318 ret = i2c_transfer(state->i2c, msg, 2);
335 struct ds3000_state *state = fe->demodulator_priv;
341 ret = ds3000_readreg(state, 0xb2);
350 state->i2c->dev.parent);
373 struct ds3000_state *state = fe->demodulator_priv;
385 ds3000_writereg(state, 0xb2, 0x01);
387 ret = ds3000_writeFW(state, 0xb0, fw->data, fw->size);
388 ds3000_writereg(state, 0xb2, 0x00);
396 struct ds3000_state *state = fe->demodulator_priv;
401 data = ds3000_readreg(state, 0xa2);
416 ds3000_writereg(state, 0xa2, data);
423 struct ds3000_state *state = fe->demodulator_priv;
431 lock = ds3000_readreg(state, 0xd1);
439 lock = ds3000_readreg(state, 0x0d);
450 if (state->config->set_lock_led)
451 state->config->set_lock_led(fe, *status == 0 ? 0 : 1);
461 struct ds3000_state *state = fe->demodulator_priv;
472 ds3000_writereg(state, 0xf9, 0x04);
474 data = ds3000_readreg(state, 0xf8);
480 *ber = (ds3000_readreg(state, 0xf7) << 8) |
481 ds3000_readreg(state, 0xf6);
486 ds3000_writereg(state, 0xf8, data);
487 ds3000_writereg(state, 0xf8, data);
495 lpdc_frames = (ds3000_readreg(state, 0xd7) << 16) |
496 (ds3000_readreg(state, 0xd6) << 8) |
497 ds3000_readreg(state, 0xd5);
499 ber_reading = (ds3000_readreg(state, 0xf8) << 8) |
500 ds3000_readreg(state, 0xf7);
503 ds3000_writereg(state, 0xd1, 0x01);
505 ds3000_writereg(state, 0xf9, 0x01);
507 ds3000_writereg(state, 0xf9, 0x00);
509 ds3000_writereg(state, 0xd1, 0x00);
535 struct ds3000_state *state = fe->demodulator_priv;
563 snr_reading = ds3000_readreg(state, 0xff);
579 dvbs2_noise_reading = (ds3000_readreg(state, 0x8c) & 0x3f) +
580 (ds3000_readreg(state, 0x8d) << 4);
581 dvbs2_signal_reading = ds3000_readreg(state, 0x8e);
621 struct ds3000_state *state = fe->demodulator_priv;
630 *ucblocks = (ds3000_readreg(state, 0xf5) << 8) |
631 ds3000_readreg(state, 0xf4);
632 data = ds3000_readreg(state, 0xf8);
635 ds3000_writereg(state, 0xf8, data);
638 ds3000_writereg(state, 0xf8, data);
641 _ucblocks = (ds3000_readreg(state, 0xe2) << 8) |
642 ds3000_readreg(state, 0xe1);
643 if (_ucblocks > state->prevUCBS2)
644 *ucblocks = _ucblocks - state->prevUCBS2;
646 *ucblocks = state->prevUCBS2 - _ucblocks;
647 state->prevUCBS2 = _ucblocks;
658 struct ds3000_state *state = fe->demodulator_priv;
667 data = ds3000_readreg(state, 0xa2);
669 ds3000_writereg(state, 0xa2, data);
674 data = ds3000_readreg(state, 0xa1);
677 ds3000_writereg(state, 0xa1, data);
681 data = ds3000_readreg(state, 0xa2);
683 ds3000_writereg(state, 0xa2, data);
693 struct ds3000_state *state = fe->demodulator_priv;
706 data = ds3000_readreg(state, 0xa2);
708 ds3000_writereg(state, 0xa2, data);
712 ds3000_writereg(state, 0xa3 + i, d->msg[i]);
714 data = ds3000_readreg(state, 0xa1);
721 ds3000_writereg(state, 0xa1, data);
725 data = ds3000_readreg(state, 0xa1);
733 data = ds3000_readreg(state, 0xa1);
736 ds3000_writereg(state, 0xa1, data);
738 data = ds3000_readreg(state, 0xa2);
741 ds3000_writereg(state, 0xa2, data);
746 data = ds3000_readreg(state, 0xa2);
749 ds3000_writereg(state, 0xa2, data);
758 struct ds3000_state *state = fe->demodulator_priv;
764 data = ds3000_readreg(state, 0xa2);
766 ds3000_writereg(state, 0xa2, data);
771 ds3000_writereg(state, 0xa1, 0x02);
774 ds3000_writereg(state, 0xa1, 0x01);
780 data = ds3000_readreg(state, 0xa1);
787 data = ds3000_readreg(state, 0xa1);
790 ds3000_writereg(state, 0xa1, data);
792 data = ds3000_readreg(state, 0xa2);
795 ds3000_writereg(state, 0xa2, data);
800 data = ds3000_readreg(state, 0xa2);
803 ds3000_writereg(state, 0xa2, data);
810 struct ds3000_state *state = fe->demodulator_priv;
812 if (state->config->set_lock_led)
813 state->config->set_lock_led(fe, 0);
816 kfree(state);
824 struct ds3000_state *state;
829 /* allocate memory for the internal state */
830 state = kzalloc(sizeof(*state), GFP_KERNEL);
831 if (!state)
834 state->config = config;
835 state->i2c = i2c;
836 state->prevUCBS2 = 0;
839 ret = ds3000_readreg(state, 0x00) & 0xfe;
841 kfree(state);
847 ds3000_readreg(state, 0x02),
848 ds3000_readreg(state, 0x01));
850 memcpy(&state->frontend.ops, &ds3000_ops,
852 state->frontend.demodulator_priv = state;
859 ds3000_set_voltage(&state->frontend, SEC_VOLTAGE_OFF);
860 return &state->frontend;
867 struct ds3000_state *state = fe->demodulator_priv;
877 ds3000_writereg(state, 0x5f, tmp >> 8);
878 ds3000_writereg(state, 0x5e, tmp & 0xff);
885 struct ds3000_state *state = fe->demodulator_priv;
896 if (state->config->set_ts_params)
897 state->config->set_ts_params(fe, 0);
903 ds3000_writereg(state, 0x07, 0x80);
904 ds3000_writereg(state, 0x07, 0x00);
906 ds3000_writereg(state, 0xb2, 0x01);
908 ds3000_writereg(state, 0x00, 0x01);
914 ds3000_writereg(state,
917 value = ds3000_readreg(state, 0xfe);
920 ds3000_writereg(state, 0xfe, value);
925 ds3000_writereg(state,
929 ds3000_writereg(state, 0xfe, 0x54);
931 ds3000_writereg(state, 0xfe, 0x98);
938 ds3000_writereg(state, 0x29, 0x80);
940 ds3000_writereg(state, 0x25, 0x8a);
956 ds3000_writereg(state, 0xc3, 0x0d);
957 ds3000_writereg(state, 0xc8, value);
958 ds3000_writereg(state, 0xc4, 0x10);
959 ds3000_writereg(state, 0xc7, 0x0e);
964 ds3000_writereg(state, 0xc3, 0x07);
965 ds3000_writereg(state, 0xc8, value);
966 ds3000_writereg(state, 0xc4, 0x09);
967 ds3000_writereg(state, 0xc7, 0x12);
970 ds3000_writereg(state, 0xc3, value);
971 ds3000_writereg(state, 0xc8, 0x0e);
972 ds3000_writereg(state, 0xc4, 0x07);
973 ds3000_writereg(state, 0xc7, 0x18);
976 ds3000_writereg(state, 0xc3, value);
977 ds3000_writereg(state, 0xc8, 0x0a);
978 ds3000_writereg(state, 0xc4, 0x05);
979 ds3000_writereg(state, 0xc7, 0x24);
985 ds3000_writereg(state, 0x61, value & 0x00ff);
986 ds3000_writereg(state, 0x62, (value & 0xff00) >> 8);
989 ds3000_writereg(state, 0x56, 0x00);
992 ds3000_writereg(state, 0x76, 0x00);
994 /*ds3000_writereg(state, 0x08, 0x03);
995 ds3000_writereg(state, 0xfd, 0x22);
996 ds3000_writereg(state, 0x08, 0x07);
997 ds3000_writereg(state, 0xfd, 0x42);
998 ds3000_writereg(state, 0x08, 0x07);*/
1000 if (state->config->ci_mode) {
1004 ds3000_writereg(state, 0xfd, 0x80);
1007 ds3000_writereg(state, 0xfd, 0x01);
1013 ds3000_writereg(state, 0x00, 0x00);
1015 ds3000_writereg(state, 0xb2, 0x00);
1053 struct ds3000_state *state = fe->demodulator_priv;
1055 if (state->config->set_lock_led)
1056 state->config->set_lock_led(fe, 0);
1069 struct ds3000_state *state = fe->demodulator_priv;
1074 ds3000_writereg(state, 0x08, 0x01 | ds3000_readreg(state, 0x08));