Lines Matching refs:ext_attr
2235 struct drxj_data *ext_attr = (struct drxj_data *) (NULL);
2240 ext_attr = (struct drxj_data *) demod->my_ext_attr;
2244 hi_cmd.param2 = ext_attr->hi_cfg_timing_div;
2245 hi_cmd.param3 = ext_attr->hi_cfg_bridge_delay;
2246 hi_cmd.param4 = ext_attr->hi_cfg_wake_up_key;
2247 hi_cmd.param5 = ext_attr->hi_cfg_ctrl;
2248 hi_cmd.param6 = ext_attr->hi_cfg_transmit;
2257 ext_attr->hi_cfg_ctrl &= (~(SIO_HI_RA_RAM_PAR_5_CFG_SLEEP_ZZZ));
2391 struct drxj_data *ext_attr = (struct drxj_data *) (NULL);
2396 ext_attr = (struct drxj_data *) demod->my_ext_attr;
2409 ext_attr->hi_cfg_timing_div =
2412 if ((ext_attr->hi_cfg_timing_div) > SIO_HI_RA_RAM_PAR_2_CFG_DIV__M)
2413 ext_attr->hi_cfg_timing_div = SIO_HI_RA_RAM_PAR_2_CFG_DIV__M;
2417 ext_attr->hi_cfg_bridge_delay =
2421 if ((ext_attr->hi_cfg_bridge_delay) > SIO_HI_RA_RAM_PAR_3_CFG_DBL_SDA__M)
2422 ext_attr->hi_cfg_bridge_delay = SIO_HI_RA_RAM_PAR_3_CFG_DBL_SDA__M;
2424 ext_attr->hi_cfg_bridge_delay += ((ext_attr->hi_cfg_bridge_delay) <<
2429 ext_attr->hi_cfg_wake_up_key = DRXJ_WAKE_UP_KEY;
2431 ext_attr->hi_cfg_ctrl = (SIO_HI_RA_RAM_PAR_5_CFG_SLV0_SLAVE);
2433 ext_attr->hi_cfg_transmit = SIO_HI_RA_RAM_PAR_6__PRE;
2467 * * ext_attr->has_lna
2468 * * ext_attr->has_ntsc
2469 * * ext_attr->has_btsc
2470 * * ext_attr->has_oob
2476 struct drxj_data *ext_attr = (struct drxj_data *) NULL;
2484 ext_attr = (struct drxj_data *) demod->my_ext_attr;
2532 ext_attr->mfx = (u8) ((sio_top_jtagid_lo >> 29) & 0xF);
2553 ext_attr->has_lna = true;
2554 ext_attr->has_ntsc = false;
2555 ext_attr->has_btsc = false;
2556 ext_attr->has_oob = false;
2557 ext_attr->has_smatx = true;
2558 ext_attr->has_smarx = false;
2559 ext_attr->has_gpio = false;
2560 ext_attr->has_irqn = false;
2563 ext_attr->has_lna = false;
2564 ext_attr->has_ntsc = false;
2565 ext_attr->has_btsc = false;
2566 ext_attr->has_oob = false;
2567 ext_attr->has_smatx = true;
2568 ext_attr->has_smarx = false;
2569 ext_attr->has_gpio = false;
2570 ext_attr->has_irqn = false;
2573 ext_attr->has_lna = true;
2574 ext_attr->has_ntsc = true;
2575 ext_attr->has_btsc = false;
2576 ext_attr->has_oob = false;
2577 ext_attr->has_smatx = true;
2578 ext_attr->has_smarx = true;
2579 ext_attr->has_gpio = true;
2580 ext_attr->has_irqn = false;
2583 ext_attr->has_lna = false;
2584 ext_attr->has_ntsc = true;
2585 ext_attr->has_btsc = false;
2586 ext_attr->has_oob = false;
2587 ext_attr->has_smatx = true;
2588 ext_attr->has_smarx = true;
2589 ext_attr->has_gpio = true;
2590 ext_attr->has_irqn = false;
2593 ext_attr->has_lna = true;
2594 ext_attr->has_ntsc = true;
2595 ext_attr->has_btsc = true;
2596 ext_attr->has_oob = false;
2597 ext_attr->has_smatx = true;
2598 ext_attr->has_smarx = true;
2599 ext_attr->has_gpio = true;
2600 ext_attr->has_irqn = false;
2603 ext_attr->has_lna = false;
2604 ext_attr->has_ntsc = true;
2605 ext_attr->has_btsc = true;
2606 ext_attr->has_oob = false;
2607 ext_attr->has_smatx = true;
2608 ext_attr->has_smarx = true;
2609 ext_attr->has_gpio = true;
2610 ext_attr->has_irqn = false;
2613 ext_attr->has_lna = true;
2614 ext_attr->has_ntsc = false;
2615 ext_attr->has_btsc = false;
2616 ext_attr->has_oob = true;
2617 ext_attr->has_smatx = true;
2618 ext_attr->has_smarx = true;
2619 ext_attr->has_gpio = true;
2620 ext_attr->has_irqn = true;
2623 ext_attr->has_lna = false;
2624 ext_attr->has_ntsc = true;
2625 ext_attr->has_btsc = true;
2626 ext_attr->has_oob = true;
2627 ext_attr->has_smatx = true;
2628 ext_attr->has_smarx = true;
2629 ext_attr->has_gpio = true;
2630 ext_attr->has_irqn = true;
2633 ext_attr->has_lna = true;
2634 ext_attr->has_ntsc = true;
2635 ext_attr->has_btsc = true;
2636 ext_attr->has_oob = true;
2637 ext_attr->has_smatx = true;
2638 ext_attr->has_smarx = true;
2639 ext_attr->has_gpio = true;
2640 ext_attr->has_irqn = true;
2643 ext_attr->has_lna = false;
2644 ext_attr->has_ntsc = true;
2645 ext_attr->has_btsc = true;
2646 ext_attr->has_oob = true;
2647 ext_attr->has_smatx = true;
2648 ext_attr->has_smarx = true;
2649 ext_attr->has_gpio = true;
2650 ext_attr->has_irqn = true;
2731 struct drxj_data *ext_attr = (struct drxj_data *) (NULL);
2753 ext_attr = (struct drxj_data *) demod->my_ext_attr;
2759 switch (ext_attr->standard) {
2774 switch (ext_attr->standard) {
2821 switch (ext_attr->constellation) {
2839 } /* ext_attr->constellation */
2843 (ext_attr->curr_symbol_rate / 8) * nr_bits * 188;
2915 switch (ext_attr->standard) {
2921 switch (ext_attr->constellation) {
2943 } /* ext_attr->standard */
2950 switch (ext_attr->standard) {
2956 switch (ext_attr->constellation) {
2978 } /* ext_attr->standard */
3022 switch (ext_attr->standard) {
3035 if (ext_attr->curr_symbol_rate >=
3087 if (ext_attr->mpeg_output_clock_rate != DRXJ_MPEGOUTPUT_CLOCK_RATE_AUTO)
3088 fec_oc_dto_period = ext_attr->mpeg_output_clock_rate - 1;
3373 struct drxj_data *ext_attr = (struct drxj_data *) (NULL);
3381 ext_attr = (struct drxj_data *) demod->my_ext_attr;
3405 if (ext_attr->disable_te_ihandling) {
3446 struct drxj_data *ext_attr = (struct drxj_data *) (NULL);
3452 ext_attr = (struct drxj_data *) demod->my_ext_attr;
3463 if (ext_attr->bit_reverse_mpeg_outout)
3489 struct drxj_data *ext_attr = (struct drxj_data *) (NULL);
3496 ext_attr = (struct drxj_data *) demod->my_ext_attr;
3507 if (ext_attr->mpeg_start_width == DRXJ_MPEG_START_WIDTH_8CLKCYC)
3537 struct drxj_data *ext_attr = (struct drxj_data *) (NULL);
3543 ext_attr = (struct drxj_data *) demod->my_ext_attr;
3555 if (!ext_attr->has_smatx)
3561 ext_attr->uio_sma_tx_mode = uio_cfg->mode;
3564 ext_attr->uio_sma_tx_mode = uio_cfg->mode;
3579 if (!ext_attr->has_smarx)
3584 ext_attr->uio_sma_rx_mode = uio_cfg->mode;
3587 ext_attr->uio_sma_rx_mode = uio_cfg->mode;
3603 if (!ext_attr->has_gpio)
3608 ext_attr->uio_gpio_mode = uio_cfg->mode;
3611 ext_attr->uio_gpio_mode = uio_cfg->mode;
3627 if (!ext_attr->has_irqn)
3631 ext_attr->uio_irqn_mode = uio_cfg->mode;
3640 ext_attr->uio_irqn_mode = uio_cfg->mode;
3675 struct drxj_data *ext_attr = (struct drxj_data *) (NULL);
3683 ext_attr = (struct drxj_data *) demod->my_ext_attr;
3695 if (!ext_attr->has_smatx)
3697 if ((ext_attr->uio_sma_tx_mode != DRX_UIO_MODE_READWRITE)
3698 && (ext_attr->uio_sma_tx_mode != DRX_UIO_MODE_FIRMWARE_SAW)) {
3735 if (!ext_attr->has_smarx)
3737 if (ext_attr->uio_sma_rx_mode != DRX_UIO_MODE_READWRITE)
3774 if (!ext_attr->has_gpio)
3776 if (ext_attr->uio_gpio_mode != DRX_UIO_MODE_READWRITE)
3813 if (!ext_attr->has_irqn)
3816 if (ext_attr->uio_irqn_mode != DRX_UIO_MODE_READWRITE)
3918 struct drxj_data *ext_attr = NULL;
3925 ext_attr = (struct drxj_data *) demod->my_ext_attr;
3939 if (ext_attr->smart_ant_inverted) {
4391 struct drxj_data *ext_attr = NULL;
4413 ext_attr = (struct drxj_data *) demod->my_ext_attr;
4415 switch (ext_attr->standard) {
4493 p_agc_if_settings = &(ext_attr->vsb_if_agc_cfg);
4494 p_agc_rf_settings = &(ext_attr->vsb_rf_agc_cfg);
4561 p_agc_if_settings = &(ext_attr->qam_if_agc_cfg);
4562 p_agc_rf_settings = &(ext_attr->qam_rf_agc_cfg);
4769 struct drxj_data *ext_attr = demod->my_ext_attr;
4785 rf_mirror = (ext_attr->mirror == DRX_MIRROR_YES) ? true : false;
4791 switch (ext_attr->standard) {
4846 ext_attr->iqm_fs_rate_ofs = iqm_fs_rate_ofs;
4847 ext_attr->pos_image = (bool) (rf_mirror ^ tuner_mirror ^ select_pos_image);
4871 struct drxj_data *ext_attr = NULL;
4874 ext_attr = (struct drxj_data *) demod->my_ext_attr;
4882 if (ext_attr->reset_pkt_err_acc) {
4885 ext_attr->reset_pkt_err_acc = false;
4917 struct drxj_data *ext_attr = NULL;
4926 ext_attr = (struct drxj_data *) demod->my_ext_attr;
4937 if ((ext_attr->standard == agc_settings->standard) ||
4938 (DRXJ_ISQAMSTD(ext_attr->standard) &&
4940 (DRXJ_ISATVSTD(ext_attr->standard) &&
4967 if (ext_attr->standard == DRX_STANDARD_8VSB)
4969 else if (DRXJ_ISQAMSTD(ext_attr->standard))
4998 p_agc_settings = &(ext_attr->vsb_if_agc_cfg);
5000 p_agc_settings = &(ext_attr->qam_if_agc_cfg);
5002 p_agc_settings = &(ext_attr->atv_if_agc_cfg);
5102 ext_attr->vsb_rf_agc_cfg = *agc_settings;
5108 ext_attr->qam_rf_agc_cfg = *agc_settings;
5131 struct drxj_data *ext_attr = NULL;
5140 ext_attr = (struct drxj_data *) demod->my_ext_attr;
5151 if ((ext_attr->standard == agc_settings->standard) ||
5152 (DRXJ_ISQAMSTD(ext_attr->standard) &&
5154 (DRXJ_ISATVSTD(ext_attr->standard) &&
5181 if (ext_attr->standard == DRX_STANDARD_8VSB)
5183 else if (DRXJ_ISQAMSTD(ext_attr->standard))
5212 p_agc_settings = &(ext_attr->vsb_rf_agc_cfg);
5214 p_agc_settings = &(ext_attr->qam_rf_agc_cfg);
5216 p_agc_settings = &(ext_attr->atv_rf_agc_cfg);
5331 ext_attr->vsb_if_agc_cfg = *agc_settings;
5337 ext_attr->qam_if_agc_cfg = *agc_settings;
5722 struct drxj_data *ext_attr = NULL;
5758 ext_attr = (struct drxj_data *) demod->my_ext_attr;
5825 ext_attr->iqm_rc_rate_ofs = 0x00AD0D79;
5826 rc = drxdap_fasi_write_reg32(dev_addr, IQM_RC_RATE_OFS_LO__A, ext_attr->iqm_rc_rate_ofs, 0);
6042 if (!ext_attr->has_lna) {
6067 rc = set_agc_if(demod, &(ext_attr->vsb_if_agc_cfg), false);
6072 rc = set_agc_rf(demod, &(ext_attr->vsb_rf_agc_cfg), false);
6082 vsb_pga_cfg.gain = ext_attr->vsb_pga_cfg;
6089 rc = ctrl_set_cfg_pre_saw(demod, &(ext_attr->vsb_pre_saw_cfg));
6470 * TODO: overriding the ext_attr->fec_bits_desired by constellation dependent
6481 struct drxj_data *ext_attr = NULL; /* Global data container for DRXJ specific data */
6495 ext_attr = (struct drxj_data *) demod->my_ext_attr;
6497 fec_bits_desired = ext_attr->fec_bits_desired;
6498 fec_rs_prescale = ext_attr->fec_rs_prescale;
6526 /* TODO: use constant instead of calculation and remove the fec_rs_plen in ext_attr */
6527 switch (ext_attr->standard) {
6539 ext_attr->fec_rs_plen = fec_rs_plen; /* for getSigQual */
6546 if (ext_attr->standard != DRX_STANDARD_ITU_B)
6554 switch (ext_attr->standard) {
6591 ext_attr->fec_rs_period = (u16) fec_rs_period;
6592 ext_attr->fec_rs_prescale = fec_rs_prescale;
6609 if (ext_attr->standard == DRX_STANDARD_ITU_B) {
6618 fec_vd_plen = ext_attr->fec_vd_plen;
6619 qam_vd_prescale = ext_attr->qam_vd_prescale;
6660 ext_attr->qam_vd_period = (u16) qam_vd_period;
6661 ext_attr->qam_vd_prescale = qam_vd_prescale;
7862 struct drxj_data *ext_attr = NULL;
8000 ext_attr = (struct drxj_data *) demod->my_ext_attr;
8004 if (ext_attr->standard == DRX_STANDARD_ITU_B) {
8044 if (ext_attr->standard == DRX_STANDARD_ITU_A) {
8048 } else if (ext_attr->standard == DRX_STANDARD_ITU_B) {
8052 } else if (ext_attr->standard == DRX_STANDARD_ITU_C) {
8152 ext_attr->iqm_rc_rate_ofs = iqm_rc_rate;
8186 if (!ext_attr->has_lna) {
8267 if (ext_attr->standard == DRX_STANDARD_ITU_B) {
8473 rc = set_agc_if(demod, &(ext_attr->qam_if_agc_cfg), false);
8478 rc = set_agc_rf(demod, &(ext_attr->qam_rf_agc_cfg), false);
8488 qam_pga_cfg.gain = ext_attr->qam_pga_cfg;
8495 rc = ctrl_set_cfg_pre_saw(demod, &(ext_attr->qam_pre_saw_cfg));
8503 if (ext_attr->standard == DRX_STANDARD_ITU_A) {
8514 } else if (ext_attr->standard == DRX_STANDARD_ITU_B) {
8543 } else if (ext_attr->standard == DRX_STANDARD_ITU_C) {
8680 struct drxj_data *ext_attr = demod->my_ext_attr;
8770 ext_attr->iqm_fs_rate_ofs = iqm_fs_rate_ofs;
8771 ext_attr->pos_image = (ext_attr->pos_image) ? false : true;
8874 struct drxj_data *ext_attr = demod->my_ext_attr;
8945 ext_attr->mirror = DRX_MIRROR_YES;
9022 struct drxj_data *ext_attr = demod->my_ext_attr;
9062 ext_attr->mirror = DRX_MIRROR_YES;
9103 struct drxj_data *ext_attr = NULL;
9109 ext_attr = (struct drxj_data *) demod->my_ext_attr;
9119 if (ext_attr->standard != DRX_STANDARD_ITU_B)
9122 ext_attr->constellation = channel->constellation;
9124 ext_attr->mirror = DRX_MIRROR_NO;
9126 ext_attr->mirror = channel->mirror;
9146 if (ext_attr->standard == DRX_STANDARD_ITU_B) {
9153 ext_attr->constellation = DRX_CONSTELLATION_QAM256;
9155 ext_attr->mirror = DRX_MIRROR_NO;
9157 ext_attr->mirror = channel->mirror;
9178 ext_attr->constellation = DRX_CONSTELLATION_QAM64;
9180 ext_attr->mirror = DRX_MIRROR_NO;
9182 ext_attr->mirror = channel->mirror;
9228 } else if (ext_attr->standard == DRX_STANDARD_ITU_C) {
9232 ext_attr->constellation = DRX_CONSTELLATION_QAM64;
9236 ext_attr->mirror = DRX_MIRROR_NO;
9238 ext_attr->mirror = channel->mirror;
9466 struct drxj_data *ext_attr = demod->my_ext_attr;
9470 enum drx_modulation constellation = ext_attr->constellation;
9520 fec_rs_period = ext_attr->fec_rs_period;
9521 fec_rs_prescale = ext_attr->fec_rs_prescale;
9522 rs_bit_cnt = fec_rs_period * fec_rs_prescale * ext_attr->fec_rs_plen;
9523 qam_vd_period = ext_attr->qam_vd_period;
9524 qam_vd_prescale = ext_attr->qam_vd_prescale;
9525 vd_bit_cnt = qam_vd_period * qam_vd_prescale * ext_attr->fec_vd_plen;
9635 if (ext_attr->standard == DRX_STANDARD_ITU_B) {
9846 struct drxj_data *ext_attr = NULL;
9850 ext_attr = (struct drxj_data *) demod->my_ext_attr;
9858 ext_attr->aud_data.audio_is_active = false;
9928 struct drxj_data *ext_attr = NULL;
9951 ext_attr = (struct drxj_data *) demod->my_ext_attr;
9952 mirror_freq_spect_oob = ext_attr->mirror_freq_spect_oob;
9978 ext_attr->oob_power_on = false;
9990 u16 *trk_filtercfg = ext_attr->oob_trk_filter_cfg;
10154 rc = drxj_dap_write_reg16(dev_addr, ORX_NSU_AOX_LOPOW_W__A, ext_attr->oob_lo_pow, 0);
10410 rc = drxj_dap_write_reg16(dev_addr, ORX_NSU_AOX_STHR_W__A, ext_attr->oob_pre_saw, 0);
10416 ext_attr->oob_power_on = true;
10450 struct drxj_data *ext_attr = NULL;
10464 ext_attr = (struct drxj_data *) demod->my_ext_attr;
10465 standard = ext_attr->standard;
10587 if ((ext_attr->uio_sma_tx_mode) == DRX_UIO_MODE_FIRMWARE_SAW) {
10625 ext_attr->mirror = DRX_MIRROR_NO;
10627 ext_attr->mirror = channel->mirror;
10656 ext_attr->reset_pkt_err_acc = true;
10683 struct drxj_data *ext_attr = demod->my_ext_attr;
10686 enum drx_standard standard = ext_attr->standard;
10795 struct drxj_data *ext_attr = NULL;
10812 ext_attr = (struct drxj_data *) demod->my_ext_attr;
10813 standard = ext_attr->standard;
10884 struct drxj_data *ext_attr = NULL;
10892 ext_attr = (struct drxj_data *) demod->my_ext_attr;
10893 prev_standard = ext_attr->standard;
10929 ext_attr->standard = *standard;
10954 ext_attr->standard = DRX_STANDARD_UNKNOWN;
10962 ext_attr->standard = DRX_STANDARD_UNKNOWN;
10968 static void drxj_reset_mode(struct drxj_data *ext_attr)
10971 if (ext_attr->has_lna) {
10974 ext_attr->qam_if_agc_cfg.standard = DRX_STANDARD_ITU_B;
10975 ext_attr->qam_if_agc_cfg.ctrl_mode = DRX_AGC_CTRL_OFF;
10976 ext_attr->qam_pga_cfg = 140 + (11 * 13);
10978 ext_attr->vsb_if_agc_cfg.standard = DRX_STANDARD_8VSB;
10979 ext_attr->vsb_if_agc_cfg.ctrl_mode = DRX_AGC_CTRL_OFF;
10980 ext_attr->vsb_pga_cfg = 140 + (11 * 13);
10984 ext_attr->qam_if_agc_cfg.standard = DRX_STANDARD_ITU_B;
10985 ext_attr->qam_if_agc_cfg.ctrl_mode = DRX_AGC_CTRL_AUTO;
10986 ext_attr->qam_if_agc_cfg.min_output_level = 0;
10987 ext_attr->qam_if_agc_cfg.max_output_level = 0x7FFF;
10988 ext_attr->qam_if_agc_cfg.speed = 3;
10989 ext_attr->qam_if_agc_cfg.top = 1297;
10990 ext_attr->qam_pga_cfg = 140;
10992 ext_attr->vsb_if_agc_cfg.standard = DRX_STANDARD_8VSB;
10993 ext_attr->vsb_if_agc_cfg.ctrl_mode = DRX_AGC_CTRL_AUTO;
10994 ext_attr->vsb_if_agc_cfg.min_output_level = 0;
10995 ext_attr->vsb_if_agc_cfg.max_output_level = 0x7FFF;
10996 ext_attr->vsb_if_agc_cfg.speed = 3;
10997 ext_attr->vsb_if_agc_cfg.top = 1024;
10998 ext_attr->vsb_pga_cfg = 140;
11003 ext_attr->qam_rf_agc_cfg.standard = DRX_STANDARD_ITU_B;
11004 ext_attr->qam_rf_agc_cfg.ctrl_mode = DRX_AGC_CTRL_AUTO;
11005 ext_attr->qam_rf_agc_cfg.min_output_level = 0;
11006 ext_attr->qam_rf_agc_cfg.max_output_level = 0x7FFF;
11007 ext_attr->qam_rf_agc_cfg.speed = 3;
11008 ext_attr->qam_rf_agc_cfg.top = 9500;
11009 ext_attr->qam_rf_agc_cfg.cut_off_current = 4000;
11010 ext_attr->qam_pre_saw_cfg.standard = DRX_STANDARD_ITU_B;
11011 ext_attr->qam_pre_saw_cfg.reference = 0x07;
11012 ext_attr->qam_pre_saw_cfg.use_pre_saw = true;
11015 ext_attr->vsb_rf_agc_cfg.standard = DRX_STANDARD_8VSB;
11016 ext_attr->vsb_rf_agc_cfg.ctrl_mode = DRX_AGC_CTRL_AUTO;
11017 ext_attr->vsb_rf_agc_cfg.min_output_level = 0;
11018 ext_attr->vsb_rf_agc_cfg.max_output_level = 0x7FFF;
11019 ext_attr->vsb_rf_agc_cfg.speed = 3;
11020 ext_attr->vsb_rf_agc_cfg.top = 9500;
11021 ext_attr->vsb_rf_agc_cfg.cut_off_current = 4000;
11022 ext_attr->vsb_pre_saw_cfg.standard = DRX_STANDARD_8VSB;
11023 ext_attr->vsb_pre_saw_cfg.reference = 0x07;
11024 ext_attr->vsb_pre_saw_cfg.use_pre_saw = true;
11043 struct drxj_data *ext_attr = (struct drxj_data *) NULL;
11049 ext_attr = (struct drxj_data *) demod->my_ext_attr;
11093 drxj_reset_mode(ext_attr);
11106 switch (ext_attr->standard) {
11130 rc = power_down_atv(demod, ext_attr->standard, true);
11143 ext_attr->standard = DRX_STANDARD_UNKNOWN;
11166 ext_attr->hi_cfg_ctrl |= SIO_HI_RA_RAM_PAR_5_CFG_SLEEP_ZZZ;
11201 struct drxj_data *ext_attr = NULL;
11205 ext_attr = (struct drxj_data *) demod->my_ext_attr;
11214 if ((ext_attr->standard == pre_saw->standard) ||
11215 (DRXJ_ISQAMSTD(ext_attr->standard) &&
11217 (DRXJ_ISATVSTD(ext_attr->standard) &&
11229 ext_attr->vsb_pre_saw_cfg = *pre_saw;
11235 ext_attr->qam_pre_saw_cfg = *pre_saw;
11264 struct drxj_data *ext_attr = NULL;
11273 ext_attr = (struct drxj_data *) demod->my_ext_attr;
11299 if (ext_attr->standard == afe_gain->standard) {
11310 ext_attr->vsb_pga_cfg = gain * 13 + 140;
11316 ext_attr->qam_pga_cfg = gain * 13 + 140;
11353 struct drxj_data *ext_attr = NULL;
11374 ext_attr = (struct drxj_data *) demod->my_ext_attr;
11501 drxj_reset_mode(ext_attr);
11502 ext_attr->standard = DRX_STANDARD_UNKNOWN;
11547 ext_attr->aud_data = drxj_default_aud_data_g;
12245 struct drxj_data *ext_attr = demod->my_ext_attr;
12248 if (!ext_attr->has_lna) {