Lines Matching defs:cx24120_readreg
162 static int cx24120_readreg(struct cx24120_state *state, u8 reg)
282 demod_rev = cx24120_readreg(state, CX24120_REG_REVISION);
314 err = cx24120_readreg(state, 0xfd);
316 ret = cx24120_readreg(state, 0xdf) & 0xfe;
388 while (cx24120_readreg(state, CX24120_REG_CMD_END)) {
421 cmd->arg[i] = cx24120_readreg(state, (cmd->len + i + 1));
592 if (!(cx24120_readreg(state, 0x93) & 0x01)) {
628 sig = cx24120_readreg(state, CX24120_REG_SIGSTR_H) >> 6;
630 sig |= cx24120_readreg(state, CX24120_REG_SIGSTR_L);
645 cnr = cx24120_readreg(state, CX24120_REG_QUALITY_H) << 8;
646 cnr |= cx24120_readreg(state, CX24120_REG_QUALITY_L);
672 ber = cx24120_readreg(state, CX24120_REG_BER_HH) << 24;
673 ber |= cx24120_readreg(state, CX24120_REG_BER_HL) << 16;
674 ber |= cx24120_readreg(state, CX24120_REG_BER_LH) << 8;
675 ber |= cx24120_readreg(state, CX24120_REG_BER_LL);
689 ucb = cx24120_readreg(state, CX24120_REG_UCB_H) << 8;
690 ucb |= cx24120_readreg(state, CX24120_REG_UCB_L);
713 lock = cx24120_readreg(state, CX24120_REG_STATUS);
802 ret = cx24120_readreg(state, CX24120_REG_FECMODE);
1227 ret = cx24120_readreg(state, CX24120_REG_RATEDIV);
1284 reg = cx24120_readreg(state, 0xfb) & 0xfe;
1286 reg = cx24120_readreg(state, 0xfc) & 0xfe;
1292 reg = cx24120_readreg(state, 0xea) & 0xfe;
1335 reg = cx24120_readreg(state, 0xfb) & 0xfe;
1354 reg = cx24120_readreg(state, 0xe1);
1407 reg = cx24120_readreg(state, 0xba);
1445 vers[i] = cx24120_readreg(state, CX24120_REG_MAILBOX);
1508 status = cx24120_readreg(state, CX24120_REG_STATUS);
1513 freq1 = cx24120_readreg(state, CX24120_REG_FREQ1);
1514 freq2 = cx24120_readreg(state, CX24120_REG_FREQ2);
1515 freq3 = cx24120_readreg(state, CX24120_REG_FREQ3);