Lines Matching defs:atbm8830_write_reg
26 static int atbm8830_write_reg(struct atbm_state *priv, u16 reg, u8 data)
85 return atbm8830_write_reg(priv, REG_READ_LATCH, lock ? 1 : 0);
98 atbm8830_write_reg(priv, REG_OSC_CLK, val);
99 atbm8830_write_reg(priv, REG_OSC_CLK + 1, val >> 8);
100 atbm8830_write_reg(priv, REG_OSC_CLK + 2, val >> 16);
121 atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 1);
122 atbm8830_write_reg(priv, REG_IF_FREQ, val);
123 atbm8830_write_reg(priv, REG_IF_FREQ+1, val >> 8);
124 atbm8830_write_reg(priv, REG_IF_FREQ+2, val >> 16);
128 atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);
131 atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 0);
136 atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);
139 atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x03);
141 atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x01);
165 atbm8830_write_reg(priv, REG_AGC_MIN, min);
166 atbm8830_write_reg(priv, REG_AGC_MAX, max);
167 atbm8830_write_reg(priv, REG_AGC_HOLD_LOOP, hold_loop);
177 atbm8830_write_reg(priv, 0x099B + i, 0x08);
179 atbm8830_write_reg(priv, 0x095B, 0x7F);
180 atbm8830_write_reg(priv, 0x09CB, 0x01);
181 atbm8830_write_reg(priv, 0x09CC, 0x7F);
182 atbm8830_write_reg(priv, 0x09CD, 0x7F);
183 atbm8830_write_reg(priv, 0x0E01, 0x20);
186 atbm8830_write_reg(priv, 0x0B03, 0x0A);
187 atbm8830_write_reg(priv, 0x0935, 0x10);
188 atbm8830_write_reg(priv, 0x0936, 0x08);
189 atbm8830_write_reg(priv, 0x093E, 0x08);
190 atbm8830_write_reg(priv, 0x096E, 0x06);
193 atbm8830_write_reg(priv, 0x0B09, 0x00);
195 atbm8830_write_reg(priv, 0x0B0A, 0x08);
205 atbm8830_write_reg(priv, REG_TS_SERIAL, cfg->serial_ts ? 1 : 0);
206 atbm8830_write_reg(priv, REG_TS_CLK_MODE, cfg->serial_ts ? 1 : 0);
208 atbm8830_write_reg(priv, REG_TS_SAMPLE_EDGE,
211 atbm8830_write_reg(priv, REG_TS_CLK_FREERUN,
237 atbm8830_write_reg(priv, 0x000A, 0);
240 atbm8830_write_reg(priv, 0x020C, 11);
243 atbm8830_write_reg(priv, REG_DEMOD_RUN, 1);
415 return atbm8830_write_reg(priv, REG_I2C_GATE, enable ? 1 : 0);