Lines Matching refs:SR_INT
84 #define SR_INT 0x04 /* Shift register full/empty */
275 out_8(&via[IER], IER_SET|SR_INT); /* enable interrupt from SR */
360 if (in_8(&via[IFR]) & SR_INT)
384 out_8(&via[IER], SR_INT); /* disable SR interrupt from VIA */
399 out_8(&via[IFR], SR_INT);
408 WAIT_FOR(in_8(&via[IFR]) & SR_INT, "CUDA response to sync (2)");
410 out_8(&via[IFR], SR_INT);
417 WAIT_FOR(in_8(&via[IFR]) & SR_INT, "CUDA response to sync (4)");
419 out_8(&via[IFR], SR_INT);
586 if ((in_8(&via[IFR]) & SR_INT) == 0) {
590 out_8(&via[IFR], SR_INT);