Lines Matching refs:start

88 	resource_size_t	start;
271 val = inb((u32)hw->cfg.start + DIVA_PCI_CTRL);
308 val = inb((u32)hw->cfg.start + TIGER_AUX_STATUS);
326 val = inb((u32)hw->cfg.start + ELSA_IRQ_ADDR);
344 val = inl((u32)hw->cfg.start + NICCY_IRQ_CTRL_REG);
349 outl(val, (u32)hw->cfg.start + NICCY_IRQ_CTRL_REG);
399 outb(TIGER_IRQ_BIT, (u32)hw->cfg.start + TIGER_AUX_IRQMASK);
402 outb(QS1000_IRQ_ON, (u32)hw->cfg.start + ELSA_IRQ_ADDR);
405 outb(QS3000_IRQ_ON, (u32)hw->cfg.start + ELSA_IRQ_ADDR);
408 val = inl((u32)hw->cfg.start + NICCY_IRQ_CTRL_REG);
410 outl(val, (u32)hw->cfg.start + NICCY_IRQ_CTRL_REG);
413 w = inw((u32)hw->cfg.start + SCT_PLX_IRQ_ADDR);
415 outw(w, (u32)hw->cfg.start + SCT_PLX_IRQ_ADDR);
419 (u32)hw->cfg.start + GAZEL_INCSR);
423 (u32)hw->cfg.start + GAZEL_INCSR);
443 outb(0, (u32)hw->cfg.start + TIGER_AUX_IRQMASK);
446 outb(QS1000_IRQ_OFF, (u32)hw->cfg.start + ELSA_IRQ_ADDR);
449 outb(QS3000_IRQ_OFF, (u32)hw->cfg.start + ELSA_IRQ_ADDR);
452 val = inl((u32)hw->cfg.start + NICCY_IRQ_CTRL_REG);
454 outl(val, (u32)hw->cfg.start + NICCY_IRQ_CTRL_REG);
457 w = inw((u32)hw->cfg.start + SCT_PLX_IRQ_ADDR);
459 outw(w, (u32)hw->cfg.start + SCT_PLX_IRQ_ADDR);
463 outb(0, (u32)hw->cfg.start + GAZEL_INCSR);
492 outb(0, (u32)hw->cfg.start + DIVA_PCI_CTRL);
494 outb(DIVA_RESET_BIT, (u32)hw->cfg.start + DIVA_PCI_CTRL);
497 outb(9, (u32)hw->cfg.start + 0x69);
499 (u32)hw->cfg.start + DIVA_PCI_CTRL);
533 w = inw((u32)hw->cfg.start + SCT_PLX_RESET_ADDR);
535 outw(w, (u32)hw->cfg.start + SCT_PLX_RESET_ADDR);
537 w = inw((u32)hw->cfg.start + SCT_PLX_RESET_ADDR);
539 outw(w, (u32)hw->cfg.start + SCT_PLX_RESET_ADDR);
543 val = inl((u32)hw->cfg.start + GAZEL_CNTRL);
545 outl(val, (u32)hw->cfg.start + GAZEL_CNTRL);
548 outl(val, (u32)hw->cfg.start + GAZEL_CNTRL);
555 val = inl((u32)hw->cfg.start + GAZEL_CNTRL);
557 outl(val, (u32)hw->cfg.start + GAZEL_CNTRL);
560 outl(val, (u32)hw->cfg.start + GAZEL_CNTRL);
634 release_mem_region(hw->cfg.start, hw->cfg.size);
638 release_region(hw->cfg.start, hw->cfg.size);
643 release_mem_region(hw->addr.start, hw->addr.size);
647 release_region(hw->addr.start, hw->addr.size);
658 hw->cfg.start = pci_resource_start(hw->pdev, hw->ci->cfg_bar);
661 if (!request_mem_region(hw->cfg.start, hw->cfg.size,
665 if (!request_region(hw->cfg.start, hw->cfg.size,
672 (ulong)hw->cfg.start, (ulong)hw->cfg.size);
677 hw->cfg.p = ioremap(hw->cfg.start, hw->cfg.size);
683 hw->name, (ulong)hw->cfg.start,
688 hw->addr.start = pci_resource_start(hw->pdev, hw->ci->addr_bar);
691 if (!request_mem_region(hw->addr.start, hw->addr.size,
695 if (!request_region(hw->addr.start, hw->addr.size,
702 (ulong)hw->addr.start, (ulong)hw->addr.size);
707 hw->addr.p = ioremap(hw->addr.start, hw->addr.size);
713 hw->name, (ulong)hw->addr.start,
723 hw->isac.a.io.ale = (u32)hw->cfg.start + DIVA_ISAC_ALE;
724 hw->isac.a.io.port = (u32)hw->cfg.start + DIVA_ISAC_PORT;
726 hw->hscx.a.io.ale = (u32)hw->cfg.start + DIVA_HSCX_ALE;
727 hw->hscx.a.io.port = (u32)hw->cfg.start + DIVA_HSCX_PORT;
749 hw->isac.a.io.ale = (u32)hw->cfg.start + TIGER_IPAC_ALE;
750 hw->isac.a.io.port = (u32)hw->cfg.start + TIGER_IPAC_PORT;
752 hw->hscx.a.io.ale = (u32)hw->cfg.start + TIGER_IPAC_ALE;
753 hw->hscx.a.io.port = (u32)hw->cfg.start + TIGER_IPAC_PORT;
754 outb(0xff, (ulong)hw->cfg.start);
756 outb(0x00, (ulong)hw->cfg.start);
758 outb(TIGER_IOMASK, (ulong)hw->cfg.start + TIGER_AUX_CTRL);
764 hw->isac.a.io.ale = (u32)hw->addr.start;
765 hw->isac.a.io.port = (u32)hw->addr.start + 1;
767 hw->hscx.a.io.ale = (u32)hw->addr.start;
768 hw->hscx.a.io.port = (u32)hw->addr.start + 1;
774 hw->isac.a.io.ale = (u32)hw->addr.start + NICCY_ISAC_ALE;
775 hw->isac.a.io.port = (u32)hw->addr.start + NICCY_ISAC_PORT;
777 hw->hscx.a.io.ale = (u32)hw->addr.start + NICCY_HSCX_ALE;
778 hw->hscx.a.io.port = (u32)hw->addr.start + NICCY_HSCX_PORT;
783 hw->isac.a.io.ale = (u32)hw->addr.start;
793 hw->isac.a.io.ale = (u32)hw->addr.start + 0x08;
803 hw->isac.a.io.ale = (u32)hw->addr.start + 0x10;
813 hw->isac.a.io.ale = (u32)hw->addr.start + 0x20;
824 hw->isac.a.io.port = (u32)hw->addr.start;
832 hw->isac.a.io.ale = (u32)hw->addr.start;
833 hw->isac.a.io.port = (u32)hw->addr.start + GAZEL_IPAC_DATA_PORT;