Lines Matching refs:base
62 void __iomem *base; /* IO Memory base address */
73 void __iomem *base = priv->base;
74 void __iomem *stat_reg = base + VT8500_ICIS + (d->hwirq < 32 ? 0 : 4);
78 edge = readb(base + VT8500_ICDC + d->hwirq) & VT8500_EDGE;
85 dctr = readb(base + VT8500_ICDC + d->hwirq);
87 writeb(dctr, base + VT8500_ICDC + d->hwirq);
94 void __iomem *base = priv->base;
97 dctr = readb(base + VT8500_ICDC + d->hwirq);
99 writeb(dctr, base + VT8500_ICDC + d->hwirq);
105 void __iomem *base = priv->base;
108 dctr = readb(base + VT8500_ICDC + d->hwirq);
127 writeb(dctr, base + VT8500_ICDC + d->hwirq);
140 static void __init vt8500_init_irq_hw(void __iomem *base)
145 writel(ICPC_ROTATE, base + VT8500_ICPC_IRQ);
146 writel(0x00, base + VT8500_ICPC_FIQ);
150 writeb(VT8500_INT_DISABLE | ICDC_IRQ, base + VT8500_ICDC + i);
170 void __iomem *base;
174 base = intc[i].base;
175 irqnr = readl_relaxed(base) & 0x3F;
181 stat = readl_relaxed(base + VT8500_ICIS + 4);
202 intc[active_cnt].base = of_iomap(np, 0);
206 if (!intc[active_cnt].base) {
218 vt8500_init_irq_hw(intc[active_cnt].base);