Lines Matching refs:data
39 static int imx_irqsteer_get_reg_index(struct irqsteer_data *data,
42 return (data->reg_num - irqnum / 32 - 1);
47 struct irqsteer_data *data = d->chip_data;
48 int idx = imx_irqsteer_get_reg_index(data, d->hwirq);
52 raw_spin_lock_irqsave(&data->lock, flags);
53 val = readl_relaxed(data->regs + CHANMASK(idx, data->reg_num));
55 writel_relaxed(val, data->regs + CHANMASK(idx, data->reg_num));
56 raw_spin_unlock_irqrestore(&data->lock, flags);
61 struct irqsteer_data *data = d->chip_data;
62 int idx = imx_irqsteer_get_reg_index(data, d->hwirq);
66 raw_spin_lock_irqsave(&data->lock, flags);
67 val = readl_relaxed(data->regs + CHANMASK(idx, data->reg_num));
69 writel_relaxed(val, data->regs + CHANMASK(idx, data->reg_num));
70 raw_spin_unlock_irqrestore(&data->lock, flags);
94 static int imx_irqsteer_get_hwirq_base(struct irqsteer_data *data, u32 irq)
98 for (i = 0; i < data->irq_count; i++) {
99 if (data->irq[i] == irq)
108 struct irqsteer_data *data = irq_desc_get_handler_data(desc);
115 hwirq = imx_irqsteer_get_hwirq_base(data, irq);
123 int idx = imx_irqsteer_get_reg_index(data, hwirq);
127 if (hwirq >= data->reg_num * 32)
130 irqmap = readl_relaxed(data->regs +
131 CHANSTATUS(idx, data->reg_num));
134 virq = irq_find_mapping(data->domain, pos + hwirq);
146 struct irqsteer_data *data;
150 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
151 if (!data)
154 data->regs = devm_platform_ioremap_resource(pdev, 0);
155 if (IS_ERR(data->regs)) {
157 return PTR_ERR(data->regs);
160 data->ipg_clk = devm_clk_get(&pdev->dev, "ipg");
161 if (IS_ERR(data->ipg_clk))
162 return dev_err_probe(&pdev->dev, PTR_ERR(data->ipg_clk),
165 raw_spin_lock_init(&data->lock);
170 ret = of_property_read_u32(np, "fsl,channel", &data->channel);
178 data->irq_count = DIV_ROUND_UP(irqs_num, 64);
179 data->reg_num = irqs_num / 32;
182 data->saved_reg = devm_kzalloc(&pdev->dev,
183 sizeof(u32) * data->reg_num,
185 if (!data->saved_reg)
189 ret = clk_prepare_enable(data->ipg_clk);
196 writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);
198 data->domain = irq_domain_add_linear(np, data->reg_num * 32,
199 &imx_irqsteer_domain_ops, data);
200 if (!data->domain) {
206 if (!data->irq_count || data->irq_count > CHAN_MAX_OUTPUT_INT) {
211 for (i = 0; i < data->irq_count; i++) {
212 data->irq[i] = irq_of_parse_and_map(np, i);
213 if (!data->irq[i]) {
218 irq_set_chained_handler_and_data(data->irq[i],
220 data);
223 platform_set_drvdata(pdev, data);
227 clk_disable_unprepare(data->ipg_clk);
248 static void imx_irqsteer_save_regs(struct irqsteer_data *data)
252 for (i = 0; i < data->reg_num; i++)
253 data->saved_reg[i] = readl_relaxed(data->regs +
254 CHANMASK(i, data->reg_num));
257 static void imx_irqsteer_restore_regs(struct irqsteer_data *data)
261 writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);
262 for (i = 0; i < data->reg_num; i++)
263 writel_relaxed(data->saved_reg[i],
264 data->regs + CHANMASK(i, data->reg_num));