Lines Matching defs:AT91_AIC5_SSR
39 #define AT91_AIC5_SSR 0x0
97 irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR);
114 irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR);
127 irq_reg_writel(bgc, d->hwirq, AT91_AIC5_SSR);
142 irq_reg_writel(bgc, d->hwirq, AT91_AIC5_SSR);
166 irq_reg_writel(bgc, i, AT91_AIC5_SSR);
176 irq_reg_writel(bgc, i + gc->irq_base, AT91_AIC5_SSR);
199 irq_reg_writel(bgc, i, AT91_AIC5_SSR);
212 irq_reg_writel(bgc, i + gc->irq_base, AT91_AIC5_SSR);
231 irq_reg_writel(bgc, i + gc->irq_base, AT91_AIC5_SSR);
267 irq_reg_writel(gc, i, AT91_AIC5_SSR);
294 irq_reg_writel(bgc, *out_hwirq, AT91_AIC5_SSR);