Lines Matching refs:bases
101 void __iomem **bases;
290 writel(command, iommu->bases[i] + RK_MMU_COMMAND);
310 rk_iommu_write(iommu->bases[i], RK_MMU_ZAP_ONE_LINE, iova);
320 active &= !!(rk_iommu_read(iommu->bases[i], RK_MMU_STATUS) &
332 enable &= !!(rk_iommu_read(iommu->bases[i], RK_MMU_STATUS) &
344 done &= rk_iommu_read(iommu->bases[i], RK_MMU_DTE_ADDR) == 0;
369 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS));
390 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS));
411 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS));
432 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS));
451 rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR, DTE_ADDR_DUMMY);
453 dte_addr = rk_iommu_read(iommu->bases[i], RK_MMU_DTE_ADDR);
475 void __iomem *base = iommu->bases[index];
537 int_status = rk_iommu_read(iommu->bases[i], RK_MMU_INT_STATUS);
542 iova = rk_iommu_read(iommu->bases[i], RK_MMU_PAGE_FAULT_ADDR);
547 status = rk_iommu_read(iommu->bases[i], RK_MMU_STATUS);
568 rk_iommu_base_command(iommu->bases[i], RK_MMU_CMD_ZAP_CACHE);
569 rk_iommu_base_command(iommu->bases[i], RK_MMU_CMD_PAGE_FAULT_DONE);
579 rk_iommu_write(iommu->bases[i], RK_MMU_INT_CLEAR, int_status);
854 rk_iommu_write(iommu->bases[i], RK_MMU_INT_MASK, 0);
855 rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR, 0);
881 rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR,
883 rk_iommu_base_command(iommu->bases[i], RK_MMU_CMD_ZAP_CACHE);
884 rk_iommu_write(iommu->bases[i], RK_MMU_INT_MASK, RK_MMU_IRQ_MASK);
1141 iommu->bases = devm_kcalloc(dev, num_res, sizeof(*iommu->bases),
1143 if (!iommu->bases)
1150 iommu->bases[i] = devm_ioremap_resource(&pdev->dev, res);
1151 if (IS_ERR(iommu->bases[i]))
1156 return PTR_ERR(iommu->bases[0]);