Lines Matching refs:iommu_write_reg
116 iommu_write_reg(obj, p[i], i * sizeof(u32));
142 iommu_write_reg(obj, MMU_IRQ_TWL_MASK, MMU_IRQENABLE);
144 iommu_write_reg(obj, MMU_IRQ_TLB_MISS_MASK, MMU_IRQENABLE);
152 iommu_write_reg(obj, l, MMU_CNTL);
170 iommu_write_reg(obj, pa, MMU_TTB);
175 iommu_write_reg(obj, MMU_GP_REG_BUS_ERR_BACK_EN, MMU_GP_REG);
187 iommu_write_reg(obj, l, MMU_CNTL);
246 iommu_write_reg(obj, status, MMU_IRQSTATUS);
268 iommu_write_reg(obj, val, MMU_LOCK);
279 iommu_write_reg(obj, cr->cam | MMU_CAM_V, MMU_CAM);
280 iommu_write_reg(obj, cr->ram, MMU_RAM);
282 iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
283 iommu_write_reg(obj, 1, MMU_LD_TLB);
429 iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
453 iommu_write_reg(obj, 1, MMU_GFLUSH);
824 iommu_write_reg(obj, 0, MMU_IRQENABLE);